本論文的研究主題係藉由水熱法(hydro-thermal growth, HTG)進行選擇性一維氧化鋅奈米線之側向成長(ZnO nanowires, ZnO-NWs)，並將其應用於高真空側向短間距三極場發射底閘極元件。主要研究內容概分為四個部份。
第一部分研究目標為降低陽極工作電壓，藉由縮短陰陽電極間距，縮短奈米線尖端之間距，在不降低電場強度下，降低陽極工作電壓，使元件可以操作在低厚度介電層狀況下，而不發生崩潰。主要方法為使用不同電極間距的光罩以定義不同電極間距大小。本實驗中所採陽極與陰極電極間距(LM)分別為7、8與9 m，保持氧化鋅奈米線成長參數不變，縮短LM大小使陰極與陽極奈米線尖端之間距離(LG)減小，在相同陽極電壓下，提升電場強度。實驗結果顯示，以電極間距LM為7 m之元件為例，於HTG成長後奈米線尖端間距LG為0.2 m，所得最低起使電壓(Von)為3.1 V(@I=5 A)與最高場發射增強因子為5029。經使用Simion 7.0商用軟體模擬不同LG: 1.2、0.7與0.2 m三種結構，模擬結果顯示發LG為0.2 m時，於二極間可獲得最密集之電位線分布，亦即可擁有最大電場強度。
第二部分研究則旨在探討改變閘極介電層厚度對元件特性之影響。所採用3種不同SiO2厚度分別為500 nm、100 nm與60 nm。實驗結果顯示，於Vg = -1 V ~ 5 V偏壓條件下，採用厚度為60 nm SiO2介電層除具有較佳的轉移電導(gm) (95.6 ~ 298.6 µS(@Va = 5 V))，亦同時具有較大之場發射增強因子(β) (1370 ~ 7082)。於使用Simion 7.0商用軟體針對3種不同陰極與閘極間距(t)50、100與150 nm模擬結果顯示，當陰極與閘距離為50 nm時，閘極對陰極奈米線尖端附近局部電場與電位擁有較大控制能力，證實同時縮短陰極與閘極之間距離以及減少介電層厚度，有助於閘極控制場發射電流，增加轉移電導數值。
於第三分研究中，我們利用晶種層底蝕刻製程進行水平奈米線成長並與無底蝕刻成長元件之電性比較。主要實驗目的為降低奈米線密度，同時減少電場屏蔽效應，使場發射電流增加。介電層統一使用100 nm厚度的SiO2。實驗結果顯示，於Vg = -5 V ~ 5 V偏壓條件下，經底蝕刻製程之元件擁有較佳轉移電導(gm) (1.91 ~ 12.65 µS(@Va = 5 V))，同時亦具有較大之場發射增強因子 (β) (8524 ~ 9975)。實驗結果得知，利用經底蝕刻成長所得側向奈米線之場發射元件，可有效減少電場屏障效應，提升閘極對場發射電流控制力，進而展現較佳轉移電導。經使用Simion 7.0商用軟體模擬2種有底蝕刻製程或是無底蝕刻製程的場發射三極元件，模擬結果顯示，有底蝕刻製程，閘極對陰極奈米線尖端附近局部電場與電位具有較大控制量，此一結果與實驗完全符合。
於第四分研究中，我們以高介電係數材料HfO2 (k=20~25)取代SiO2，厚度仍採用60 nm。經C-V量測證實，於相同介電層厚度下採用HfO2材料可提升電容效應近2倍，於閘極偏壓(Vg)於-1 V ~ 5 V電壓範圍，場發射三極電晶體元件轉移電導 (gm)可提升至210 ~ 840 µS(@Va = 5 V)、場發射增強能力(β)則增加至1702 ~ 11498。實驗結果證實，使用高值介電材料，確實可增加電容值，有助於提升閘極對場發射電流控制力與最佳轉移電導。若與近期文獻所製備的場發射三極元件比較[52]-[59]，本實驗所製備出來的真空場發射三極元件擁有較大場發射電流(5440 A)，較轉移電導(840 S)與較低陽極與閘極工作電壓(Va = 0 V ~ 5 V, Vg = -1 V ~ 5 V)。
本研究以HTG法製備出具有良好的高寬比之側向成長ZnO NWs，在FE-triode之上擁有良好的場發射電晶體之特性，並已使用Simion軟體模擬本實驗電場分佈並驗證元件特性。本研究利用側向短間距氧化鋅奈米線作為場發射底閘極電晶體發射源預期在未來於真空微電子元件應用上將極具潛力。

In this thesis, a bottom-gate (BG) high transconductance field emission triode (FE-triode) using laterally-oriented ZnO nanowires (ZnO-NWs) as electron emitters was investigated.
There are four parts in this thesis. The first part focus on the fabrication of FE diodes using laterally-oriented ZnO nanowires as electron emitters. Experimental results reveal that the samples with the spacing of electrodes (LM) of 7 m could have a tip-to-tip spacing (LG) of about 0.2 m after the synthesis of laterally-oriented ZnO nanowires using hydrothermal growth (HTG) method. It shows a turn-on voltage(VON) of 3.1 V at I=5 µA and a field enhance factor (β) of 5029. Distributions of electric field of the proposed FE diodes for the case of LG =0.2 m calculated from Simion 7.0 were presented and discussed.
The influence of the gate oxide thickness on the performance of the EFE triodes was studied and results were discussed in the second part of this tesis. FE-triodes with SiO2 thickness of 500, 100 and 60 nm were prepared. It is found that the FE-triode with 60-nm-thick SiO2 exhibits the most satisfied performance with transconductances (gm) of 95.6 ~ 298.6 µS (@Va = -1 V ~ 5 V) and a β of 1370 ~ 7082 among all prepared samples at gate bias voltages (Vg) ranging from -1 to 5 V. The simion 7.0 software was also used to simulate cases with the space between cathode and gate electrode (da-k) of 150, 100 and 50 nm. Simulation results show that the case with da-k of 50 nm, the devcie could have the best field effect on the anode current.
Effect of the synthesized ZnO-NWs on the vertical side wall of the ZnO seed layer with and without a undercut etching is examined and results were presented and discussed in the third part of this thesis. Our experimental resutls suggestes that FE triodes with undetcut etching process for the side wall of the seed layer could exhibit a much better performance with transconductances (gm) of 1.91 ~ 12.65 µS and a β of 8524 ~ 9975 at Vg ranging from -1 to 5 V. Simulaiton resutls for devices with different NWs densities obtained from simion 7.0 were analyzed and discussed.
The final part of this thesis focuses on investigating the influence of the dielectric layer on the FE-triode characteristics. Two different dielectrics (HfO2 and SiO2) with the same thickness of 60 nm were employed. FE-triodes with bottom-gate structure were prepared and I-V characteristics were examined. It is found that FE-triodes with HfO2 gate dielectric could exhibit improved performance with transconductances (gm) ranging from 210 to 840 µS and the value of β in the range of 1702~11498 gate bias (Vg) ranging from -1 to 5 V.
It is expected that FE-triode based on laterally-grown ZnO-NWs ould be a very promising candidate for low-operating-voltage vacuum electronics in the near future.

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