在積體電路中，互補式金屬-氧化物-半導體(complementary metal-oxide-semiconductor, CMOS)元件是最重要的組成零件，而CMOS元件的基本組成包含n通道電晶體與p通道電晶體。若欲發展高性能之氮化鎵系列積體電路，製作高性能之n通道電晶體與p通道電晶體元件將是關鍵課題。一般氮化鎵金氧半場效電晶體之閘極氧化物大多使用蒸鍍或濺鍍方式製作而成，但此種氧化物容易受到蒸鍍或濺鍍製程條件而影響其品質。本論文使用偏壓輔助光電化學法(bias-assisted photoelectrochemical oxidation method) 直接氧化P型氮化鎵作為氮化鎵金屬-氧化物-半導體場效電晶體之閘極氧化層，可避免氮化鎵表面污染並降低氧半接面的介面態位密度。並以濺鍍儀(sputter)濺鍍二氧化矽作為對照組元件之閘極氧化層，分析元件直流電特性與低頻雜訊特性。
電晶體元件之閘極氧化層為Ga2O3和SiO2，厚度為20nm，閘極電壓為0V，汲極電壓為-15V時，汲極電流分別為-272μA/mm與-144μA/mm。夾止電壓分別為9V與11V，最大外部轉移互導分別為76μS/mm與28μS/mm，在偏壓VGS=100V時漏電流分別為7.3×10-6A與1.8×10-5A。
元件低頻雜訊方面，偏壓輔助光電化學法成長Ga2O3與濺鍍機成長SiO2之金氧半場效電晶體，VGS分別為-2 ~ 8V與-2 ~ 10V，虎格常數分別為0.3至9與0.8至38。由實驗得知電壓輔助光電化學法成長Ga2O3，得到較小的虎格常數。說明了使用偏壓輔助光電化學法直接在P型氮化鎵表面成長氧化層，不會因為外部蒸鍍或濺鍍條件所影響，使得半導體表面殘留的汙染物進而影響元件雜訊強度。
為了解溫度對金氧半場效電晶體元件特性之影響，在本論文中對氧化層為Ga2O3氮化鎵金氧半場效電晶體直流電特性進行變溫量測。當溫度分別為25℃，75℃，125℃，175℃和200℃，在VGS= 0V，VDS= -15V時，IDS分別為-272μA/mm，-215μA/mm，-186μA/mm，-171μA/mm和-161μA/mm。夾止電壓分別為9V，8.8V，8.6V，8.4V和8.3V。最大外部轉移互導分別為76μS/mm，61μS/mm，53μS/mm，47μS/mm和41μS/mm。在偏壓VGS=100V時漏電流分別為7.3×10-6 A，1.1×10-5 A，2.2×10-5 A，5.2×10-5 A和1.6×10-4 A。
氧化層為SiO2之金氧半場效電晶體元件，溫度分別為25℃，75℃，125℃，175℃和200℃，在VGS= 0V，VDS= -15V，IDS分別為-144μA/mm，-113μA/mm，-99μA/mm，-90μA/mm和-85μA/mm。夾止電壓分別為11V，10.8V，10.6V，10.4V和10.3V。最大外部轉移互導分別為28μS/mm，22μS/mm，19μS/mm，16μS/mm和15μS/mm。在偏壓VGS=100V時漏電流分別為1.8×10-5 A，2.8×10-5 A，5.1×10-5 A，1.2×10-4 A和3.2×10-4 A。
在高溫低頻雜訊量測P-GaN MOSFETs，雜訊功率密度最大值會隨著量測溫度的增加而向高頻飄移，這是產生-復合雜訊所產生之結果。在量測之1/kTMAX與ln(f)特性，由實驗得到氧化層為Ga2O3與SiO2之P型氮化鎵金氧半場效電晶體之活化能Ea分別為0.94與0.92eV。虎格常數隨著溫度上升而增加，這是因為溫度上升導致電流擾動量增加，所以低頻雜訊上升。

In integrated circuits, the complementary metal-oxide-semiconductor (CMOS) device is an important component and consisted of n-MOSFETs and p-MOSFETs. For fabricating high performance GaN-based integrated circuits, it is a key issue to fabricate high performance n-GaN MOSFETs and p-GaN MOSFETs. In general, the gate insulators are often deposited externally using evaporator or sputter system, and the performances of insulators are affected by the growth conditions. In this thesis, the bias-assisted photoelectrochemical oxidation method is used to oxidize p-GaN directly as gate oxide layers of p-GaN metal-oxide-semiconductor field-effect transistors for avoiding contaminants on GaN surface and decreasing the interface state density. The p-GaN MOSFETs with SiO2 films grown using sputter are also fabricated for contrast and analyze the direct-current electrical characteristics and low frequency noise properties of both devices.
The drain-source saturation current at room temperature of transistors with 20-nm-thick Ga2O3 and SiO2 films at VGS= 0V and VDS= -15V is -272μA/mm and -144μA/mm, respectively. The threshold voltage is 9V and 11V, respectively. The maximum extrinsic transconductance (gm(max)) is 76μS/mm and 28μS/mm, respectively. At VGS= 100V, gate leakage current is 7.3×10-6A and 1.8×10-5A, respectively.
According to the low frequency noise results measured in this thesis, the Hooge’s coefficients of transistors with oxide films grown by photo-assisted photoelectrochemical oxidation method and sputter deposited externally were estimated to be 0.3 ~ 9 and 0.8 ~ 38, when VGS varied from -2 ~ 8V and -2 ~ 10V, respectively. The bias-assisted photoelectrochemical oxidation method can oxidize p-GaN directly as gate oxide layers of p-GaN metal-oxide-semiconductor field-effect transistors for avoiding contaminants on GaN surface and decreasing the interface state density.
To analyze the relationship between the temperature and the electrical performances, the electrical properties of p-GaN MOSFETs with Ga2O3 gate dielectrics are measured at varied temperatures. At VGS= 0V and VDS= -15V, the IDS is -272μA/mm, -215μA/mm, -186μA/mm, -171μA/mm and -161μA/mm, respectively when the temperature is 25oC, 75 oC, 125 oC, 175 oC and 200 oC. The threshold voltage is 9V, 8.8V, 8.6V, 8.4V and 8.3V, respectively, when the temperature is 25oC, 75 oC, 125 oC, 175 oC and 200 oC. The maximum extrinsic transconductance (gm(max)) is 76μS/mm，61μS/mm，53μS/mm，47μS/mm and 41μS/mm, respectively, when the temperature is 25oC, 75 oC, 125 oC, 175 oC and 200 oC. At VGS= 100V, gate leakage current is 7.3×10-6A, 1.1×10-5A, 2.2×10-5 A, 5.2×10-5 A, and 1.6×10-4 A, respectively.
To analyze the relationship between the temperature and the electrical performances, the electrical properties of p-GaN MOSFETs with SiO2 gate dielectrics are measured at varied temperatures. At VGS= 0V and VDS= -15V, the IDS is -144μA/mm, -113μA/mm, -99μA/mm, -90μA/mm and -85μA/mm, respectively when the temperature is 25oC, 75 oC, 125 oC, 175 oC and 200 oC. The threshold voltage is 11V, 10.8V, 10.6V, 10.4V and 10.3V, respectively, when the temperature is 25oC, 75 oC, 125 oC, 175 oC and 200 oC. The maximum extrinsic transconductance (gm(max)) is 28μS/mm, 22μS/mm, 19μS/mm, 16μS/mm and 15μS/mm, respectively, when the temperature is 25oC, 75 oC, 125 oC, 175 oC and 200 oC. At VGS= 100V, gate leakage current is 1.8×10-5 A, 2.8×10-5 A, 5.1×10-5 A, 1.2×10-4 A, and 3.2×10-4 A, respectively.
The low frequency noise performances of transistors operated at high temperature were measured in this thesis. The temperature corresponded to the maximum noise value (Tmax) increases with frequency and that is a typical for the generation-recombination noise caused by a location level. The local levels of transistors with oxide films grown by photo-assisted photoelectrochemical oxidation method and sputter deposited externally were estimated to be 0.94 and 0.92, respectively. The increasing of Hooge¢s coefficient is attributed to the increasing of the level of low frequency noise caused by serious phonon as higher temperature.

第一章
[1] P. S. Chen, C. S. Lee, J. T. Yan and C. T. Lee, “Performance Improvement and Mechanism of Chlorine-Treated InGaN-GaN Light-Emitting Diodes,” Electrochem. Solid State Lett., vol. 10, pp. H165-H167, 2007.
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第二章
[1]半導體製造技術(Semiconductor Manufacturing Technology) Michael Quirk, Julian Serda著，劉文超．許渭州 校閱，羅文雄．蔡榮輝．鄭岫盈 譯。
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第三章
[1] C. T. Lee, and H. W. Kao, “Long-term thermal stability of Ti/Al/Pt/Au Ohmic contacts to n-type GaN,” Appl. Phys. Lett., vol. 76, pp. 2364-2366, 2000.
[2] D. F. Wang, F. Shiwei, C. Lu, A. Motayed, M. Jah, S. N. Mohammad, K. A. Jones, and L. Salamanca-Riba, “Low-resistance Ti/Al/Ti/Au multilayer ohmic contact to n-GaN,” J. Appl. Phys., vol. 89, pp. 6214-6217, 2001.
[3] Y. J. Lin, H. Y. Lee, F. T. Hwang, and C. T. Lee, “Low resistive ohmic contact formation on surface treated-n-GaN alloyed at low temperature,” J. Electron. Mater., vol. 30, pp. 532-537, 2001.
[4] P. S. Chen, and C. T. Lee, “Investigation of ohmic mechanism for chlorine-treated p-type GaN using x-ray photoelectron spectroscopy,” J. Appl. Phys., vol. 100, pp. (044510-1)-(044510-4), 2006.
[5] P. S. Chen, C. S. Lee, and C. T. Lee, “Performance improvement and mechanism of chlorine-treated InGaN–GaN light-emitting diodes,” Electrochem. Solid State Lett., vol. 10, pp. H165-H167, 2007.
[6]譚偉文(Wei-WenTan), “Investigation of electrical properties of Photoelectrochemistry oxide film formation on n-type GaN MOSFETs,” 成大微電子所碩士論文, 2005.
[7] L. H. Huang, K. C. Kan, and C. T. Lee, “Analysis of oxidized p-GaN films directly grown using bias-assisted Photoelectrochemical Method,” J. Electron. Mater., vol. 38, pp. 529-532, 2009.

第四章
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