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研究生: 廖亞威
Liao, Ya-Wei
論文名稱: 開發高密度電漿深蝕刻技術應用於矽晶圓切割
Development of High Density Plasma Etching Technology for Silicon Wafer Dicing
指導教授: 洪昭南
HONG, ZHAO-NAN
學位類別: 碩士
Master
系所名稱: 工學院 - 化學工程學系
Department of Chemical Engineering
論文出版年: 2018
畢業學年度: 106
語文別: 中文
論文頁數: 127
中文關鍵詞: 矽深蝕刻電漿切割感應耦合式電漿Bosch製程深反應性離子蝕刻
外文關鍵詞: deep silicon etching, plasma dicing, inductively coupled plasma, Bosch process, deep reactive ion etching
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  • 電漿切割技術係利用電漿蝕刻對矽晶圓進行深蝕刻使其分離,相較於現行產業界所使用之鑽石刀切割技術與雷射切割技術,電漿切割技術擁有諸多優點,且在晶片大小與切割溝道之線寬不斷微縮、晶圓厚度不斷下降下,電漿切割技術之優勢更為顯著,其不僅可切割較小之切割溝道線寬、切割效率高、不會對晶片產生物理性之破壞、不會對晶片有高溫之熱影響區效應、晶片形狀多樣化,且其切割之晶片品質與晶片強度
    為電漿切割技術最顯著之製程優勢。

    本研究以感應耦合式電漿系統產生高密度電漿進行Bosch蝕刻製程,第一部分僅探討蝕刻製程之各項蝕刻條件變化對於矽蝕刻速率之影響,所得之最高矽蝕刻速率為11.6μm/min。第二部分使用微影製程定義蝕刻溝道之線寬,線寬為約32μm,以完整之Bosch製程進行蝕刻步驟與沉積步驟之變化調整探討對於矽深蝕刻之影響,以達垂直蝕刻圖形與高蝕刻速率,所得之最趨近垂直蝕刻圖形之矽蝕刻速率為8.03μm/min,但蝕刻圖形上部仍有弓形蝕刻輪廓產生。第三部分以合作廠商所提供之產線試片進行測試,先由合作廠商使用雷射切割將切割溝道上之金屬層與介電層去除並同時定義切割溝道之線寬,我方再進行雷射切割後之切割溝道分析以確認切割溝道上之金屬殘留量不會影響電漿切割矽之進行,並於電漿蝕刻矽前先以電漿灰化去除蝕刻溝道表面之碳。由不同雷射切割方式前處理之試片,其所欲達成垂直蝕刻圖形之蝕刻條件相異,本部分所達到之最佳蝕刻結果為於試片之蝕刻溝道線寬為14.5μm下,矽蝕刻速率為5.94μm/min,蝕刻結果為垂直蝕刻圖形,並沒有底切與弓形蝕刻輪廓產生。第四部分為蝕刻阻擋層之阻擋能力測試,共以合作廠商提供之PI、雷射切割保護液PVA與二氧化矽基板作為測試樣品,在本研究之電漿切割條件下,雷射切割保護液PVA具有較佳之抗蝕刻能力與高選擇比。

    In this study, plasma dicing was performed using inductively coupled plasma to generate high density plasma. The plasma dicing technology was based on Bosch process to conduct deep silicon etching. By adjusting the passivation and etching process, the dicing profile could be vertical with a high etching rate. The optimum dicing results achieved in the research were an etching rate of 8.03μm/min and 5.94μm/min with the linewidth of 32μm and 14.5μm. The etching profile were vertical without bowing and undercut. The testing result of etching mask resistance showed that laser saw solution and silicon dioxide had higher selectivity.

    目錄 中文摘要 I 英文延伸摘要 III 誌謝 VIII 目錄 IX 表目錄 XIV 圖目錄 XVI 第一章 緒論 1 1-1 前言 1 1-2 研究動機與目的 4 第二章 理論基礎與文獻回顧 5 2-1 晶片切割技術 5 2-1-1 鑽石刀切割技術與雷射切割技術簡介與兩者之技術限制 5 2-1-1-1 鑽石刀切割技術與其製程限制 5 2-1-1-2 雷射切割技術與其製程限制 7 2-1-2 電漿切割技術簡介與其製程優勢 9 2-2 電漿蝕刻 21 2-2-1 電漿蝕刻之名詞定義 21 2-2-2 電漿蝕刻機制 24 2-2-3 矽蝕刻 29 2-2-4 Bosch製程 32 2-2-4-1 Bosch製程原理 32 2-2-4-2 先進Bosch製程(Advanced Bosch process) 37 2-2-4-3 Bosch製程的狹窄製程視窗 38 2-2-4-4 沉積步驟機制探討 40 2-2-4-5 蝕刻溝道蝕刻圖形與側壁型態 42 2-2-4-6 深寬比蝕刻效應(ARDE) 45 2-3 電漿原理 47 2-3-1 電漿生成機制 48 2-3-2 碰撞機制 49 2-3-3 電漿種類 51 2-3-4 自我偏壓(self-bias) 53 2-3-5 平均自由路徑(mean free path, λ) 56 2-3-6 感應耦合式電漿(Inductively Coupled Plasma, ICP) 56 第三章 實驗方法與步驟 58 3-1 實驗流程 58 3-2 實驗系統 59 3-2-1 十二吋之感應耦合式電漿系統(ICP) 59 3-2-2 八吋之感應耦合式電漿系統(ICP) 61 3-2-3 光罩對準曝光系統 61 3-2-4 旋轉塗布機 62 3-2-5 真空環境用溫度貼紙 62 3-2-6 掃描式電子顯微鏡及X光能譜散佈分析儀 62 3-2-7 薄膜厚度輪廓測量儀 63 3-3 實驗材料 63 3-3-1 基板材料 63 3-3-2 實驗氣體 64 3-3-3 實驗藥品 64 3-4 實驗步驟 65 3-4-1 電漿蝕刻矽裸片 65 3-4-2 以圖案化光阻作為阻擋層 65 3-4-2-1 以AZ-P4620光阻定義圖形 (使用NDL機台) 65 3-4-2-2 以S1813光阻圖形定義(使用實驗室機台) 66 3-4-3 電漿蝕刻以圖案化光阻作為阻擋層之試片 67 3-4-4 以雷射切割定義蝕刻圖形 68 3-4-4-1 合作廠商甲之晶圓試片 68 3-4-4-2 合作廠商乙之晶圓試片 69 3-4-5 阻擋層耐電漿蝕刻特性測試 69 第四章 結果與討論 71 4-1 以未圖案定義之矽基板進行純蝕刻之探討 72 4-1-1壓力高低對蝕刻速率之影響 72 4-1-2 RF偏壓功率大小對蝕刻速率之影響 72 4-1-3 ICP功率大小對蝕刻速率之影響 73 4-1-4 添加氬氣對蝕刻速率之影響 74 4-1-5 載台高度對蝕刻速率之影響 75 4-2 以微影製程定義蝕刻溝道之矽基板進行Bosch製程之探討 78 4-2-1 一週期內沉積與蝕刻步驟時間比例對蝕刻圖形與蝕刻速率之影響 78 4-2-2 Bosch製程時間長短對蝕刻圖形之影響 79 4-2-3 Bosch製程中一週期之時間長短對蝕刻圖形與蝕刻速率之影響 80 4-2-4 沉積步驟所加之RF偏壓對蝕刻圖形與蝕刻速率之影響 82 4-2-5 Bosch製程中RF偏壓大小對蝕刻圖形與蝕刻速率之影響 83 4-2-6沉積氣體八氟環丁烷流量變化對蝕刻圖形與蝕刻速率之影響 84 4-3 以雷射切割定義蝕刻溝道之矽基板進行Bosch製程之探討 92 4-3-1雷射切割之金屬殘留現象對蝕刻造成之影響 92 4-3-2合作廠商甲之雷射切割樣品分析與電漿蝕刻之結果分析 93 4-3-2-1雷射切割樣品分析 93 4-3-2-2以電漿灰化前處理雷射切割樣品之碳殘留 94 4-3-2-3以Bosch蝕刻進行電漿切割與結果分析 94 4-3-3合作廠商乙之雷射切割樣品分析與電漿蝕刻之結果分析 103 4-3-3-1雷射切割樣品分析 103 4-3-3-2以Bosch製程進行電漿切割與結果分析 104 4-4 蝕刻阻擋層之阻擋能力測試 112 第五章 總結論與未來展望 115 5-1 總結論 115 5-2 未來展望 116 第六章 參考文獻 117

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