| 研究生: |
廖亞威 Liao, Ya-Wei |
|---|---|
| 論文名稱: |
開發高密度電漿深蝕刻技術應用於矽晶圓切割 Development of High Density Plasma Etching Technology for Silicon Wafer Dicing |
| 指導教授: |
洪昭南
HONG, ZHAO-NAN |
| 學位類別: |
碩士 Master |
| 系所名稱: |
工學院 - 化學工程學系 Department of Chemical Engineering |
| 論文出版年: | 2018 |
| 畢業學年度: | 106 |
| 語文別: | 中文 |
| 論文頁數: | 127 |
| 中文關鍵詞: | 矽深蝕刻 、電漿切割 、感應耦合式電漿 、Bosch製程 、深反應性離子蝕刻 |
| 外文關鍵詞: | deep silicon etching, plasma dicing, inductively coupled plasma, Bosch process, deep reactive ion etching |
| 相關次數: | 點閱:62 下載:1 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
電漿切割技術係利用電漿蝕刻對矽晶圓進行深蝕刻使其分離,相較於現行產業界所使用之鑽石刀切割技術與雷射切割技術,電漿切割技術擁有諸多優點,且在晶片大小與切割溝道之線寬不斷微縮、晶圓厚度不斷下降下,電漿切割技術之優勢更為顯著,其不僅可切割較小之切割溝道線寬、切割效率高、不會對晶片產生物理性之破壞、不會對晶片有高溫之熱影響區效應、晶片形狀多樣化,且其切割之晶片品質與晶片強度
為電漿切割技術最顯著之製程優勢。
本研究以感應耦合式電漿系統產生高密度電漿進行Bosch蝕刻製程,第一部分僅探討蝕刻製程之各項蝕刻條件變化對於矽蝕刻速率之影響,所得之最高矽蝕刻速率為11.6μm/min。第二部分使用微影製程定義蝕刻溝道之線寬,線寬為約32μm,以完整之Bosch製程進行蝕刻步驟與沉積步驟之變化調整探討對於矽深蝕刻之影響,以達垂直蝕刻圖形與高蝕刻速率,所得之最趨近垂直蝕刻圖形之矽蝕刻速率為8.03μm/min,但蝕刻圖形上部仍有弓形蝕刻輪廓產生。第三部分以合作廠商所提供之產線試片進行測試,先由合作廠商使用雷射切割將切割溝道上之金屬層與介電層去除並同時定義切割溝道之線寬,我方再進行雷射切割後之切割溝道分析以確認切割溝道上之金屬殘留量不會影響電漿切割矽之進行,並於電漿蝕刻矽前先以電漿灰化去除蝕刻溝道表面之碳。由不同雷射切割方式前處理之試片,其所欲達成垂直蝕刻圖形之蝕刻條件相異,本部分所達到之最佳蝕刻結果為於試片之蝕刻溝道線寬為14.5μm下,矽蝕刻速率為5.94μm/min,蝕刻結果為垂直蝕刻圖形,並沒有底切與弓形蝕刻輪廓產生。第四部分為蝕刻阻擋層之阻擋能力測試,共以合作廠商提供之PI、雷射切割保護液PVA與二氧化矽基板作為測試樣品,在本研究之電漿切割條件下,雷射切割保護液PVA具有較佳之抗蝕刻能力與高選擇比。
In this study, plasma dicing was performed using inductively coupled plasma to generate high density plasma. The plasma dicing technology was based on Bosch process to conduct deep silicon etching. By adjusting the passivation and etching process, the dicing profile could be vertical with a high etching rate. The optimum dicing results achieved in the research were an etching rate of 8.03μm/min and 5.94μm/min with the linewidth of 32μm and 14.5μm. The etching profile were vertical without bowing and undercut. The testing result of etching mask resistance showed that laser saw solution and silicon dioxide had higher selectivity.
[1] http://www.cpushack.com/WaferFull.html
[2] Overview dicing technologies and market forecast, available from: https://www.orbotech.com/zh-Hant/news-events/webinars/plasma- dicing-webinar-sept-2016
[3] Thin wafer processing and Dicing equipment market Report, available from: https://www.slideshare.net/Yole_Developpement/thin-wafer-
processing-and-dicing-equipment-market-2016-report-by-yole-
developpement
[4] W. Kroninger and F. Mariani, Thinning and singulation of silicon: Root causes of the damage in thin chips, IEEE 56th Electronic Components and Technology Conference (ECTC), 1317–1322, May/June (2006)
[5] W.S. Lei, A. Kumar, and R. Yalamanchili, Die singulation technologies
for advanced packaging: A critical review, J. Vacuum Sci. Technol. B30, 4 (2012)
[6] H. T. Young, H. T. Liao, and H. Y. Huang, Surface integrity of silicon wafers in ultra precision machining, Int. J. Adv. Manufact. Technol. 29, 372–378 (2006)
[7] M. Fuegl, G. Mackh, E. Meissner, and L. Frey, Microelectronics
Reliability, 541735 (2014)
[8] V.R. Marinov, O. Swenson, Y. Atanasov, and N. Schneck, Laser-assisted ultrathin die packaging: Insights from a process study, Microelectron.
Eng. 101, 23–30 (2013)
[9] Marks, M. R., Z. Hassan and K. Y. Cheong, Ultrathin Wafer Pre-Assembly and Assembly Process Technologies: A Review, Critical Reviews in Solid State and Materials Sciences 40, 5, 251-290 (2015)
[10] F. W. Dabby and U. Paek, High-intensity laser-induced vaporization
and explosion of solid material, IEEE J. Quant. Electron. 8, 2, 106–111
(1972)
[11] F. Gagliano and U. Paek, Observation of laser-induced explosion of solid
materials and correlation with theory, IEEE J. Quant. Electron. 9, 6, 649
(1973)
[12] Stealth Dicing Technical information for MEMS, available from: https://www.hamamatsu.com/resources/pdf/etd/SD_tech_forMEMS_TLAS9005E.pdf
[13] W. Kroninger, Thin die production, in Materials for Advanced Packaging,
D. Lu and C.P. Wong, Eds., Springer, New York, ch. 6, 219–235 (2009)
[14] W. T. Chien and S. C. Hou, Investigating the recast layer formed during the laser trepan drilling of Inconel 718 using the Taguchi method, Int. J. Adv. Manufact. Technol. 33(3–4), 308–316, June (2007)
[15] H. Theuss, A. Koller, W. Kroeninger, S. Schoenfelder, and M. Petzold,
Proceedings of the 58th Electronic Component Technology Conference
(ECTC), 1525 ( 2008)
[16] J. M. Bovatsek, and R. S. Patel, Proceedings of SPIE Vol. 7585 (SPIE,
Bellingham, WA) (2010)
[17] D. S. Finn, Z. Lin, J. Kleinert, M. J. Darwin, and H. Zhang, Journal of Laser Applications, 27, 032004 (2015)
[18] S.J. Wu, W.V. Chao, H.S. Wang, New applications of laser on LED and semi-Conductor manufacturing, Adv. Mater. Res. 317 (319), 533–536 (2011)
[19] U. Loeschner, J. Schille, A. Streek, T. Knebel, L. Hartwig, R. Hillmann, C. Endisch, Highrate laser microprocessing using a polygon scanner system, J. Laser Appl. 27, S29303 (2015)
[20] J. Lawrence (Ed.), Advances in Laser Materials Processing: Technology,
Research and Application: Laser Dicing of Silicon and Electronics
Substrates, 2nd edition, Elsevier,Amsterdam (2017)
[21] V. Tangwarodomnukun, Towards damage-free micro-fabrication of silicon substrates using a hybrid laser-waterjet technology, Ph.D. dissertation, The University of New South Wales, February (2012)
[22] Laermer, F., Schilp, A., Method of anisotropically etching silicon, U.S.
Patent No. 5501893 (1996)
[23] R. J. Westermana, G. M. Grivnab, K. D. Mackenziea, T. Lazeranda, and J. M. Doubb, Plasma Dicing: Current State & Future Trends, ECS Transactions, 69, 6, 3-14 (2015)
[24] Frank Wei; Tomotaka Tabuchi; Thierry Lazerand; Christopher Johnston; Kenneth Mackenzie; Marco Notarianni, Plasma Dicing Fully Integrated Process-Flows Suitable for BEOL Advanced Packaging Fabrications, IEEE 67th Electronic Components and Technology Conference (ECTC), 350 – 357 (2017)
[25] Chip scale review, November-December, 15, 6, available from: http://www.chipscalereview.com/issue2011.html (2011)
[26] Richard Barnett, Plasma Dicing - Benefits and Process Considerations, available from: https://www.orbotech.com/zh-Hant/news-events/articles/plasma-dicing-benefits-and-process-considerations (2016)
[27] H. M. Rosenberg, The Solid State, Clarendon Press, Oxford (1975)
[28] Kenneth D. Mackenzie; David Pays-Volard; Linnell Martinez; Christopher Johnson; Thierry Lazerand; Russell Westerman, Plasma-based die singulation processing technology, IEEE 64th Electronic Components and Technology Conference (ECTC), 1577 – 1583 (2014)
[29] Noriyuki Matsubara; Reinhard Windemuth; Hiroshima Mitsuru; Harikai Atsushi, Plasma dicing technology, 2012 4th Electronic System-Integration Technology Conference, 1–5 (2012)
[30] D. Pays-Volard, L. Martinez, K. Mackenzie, C. Johnson, T. Lazerand, R.
Westerman, and D. Lishan, Productivity Improvement Using Plasma based Die Singulation, Plasma-Therm LLC, available from: http://csmantech.pairserver.com/newsite/gaasmantech/Digests/2014/papers/078.pdf (2014)
[31] Richard Barnett, Plasma Dicing 300mm Framed Wafers — Analysis of Improvement in Die Strength and Cost Benefits for Thin Die Singulation, IEEE 67th Electronic Components and Technology Conference (ECTC), 343 – 349 (2017)
[32] David Lishan, Thierry Lazerand, Kenneth Mackenzie, David Pays-Volard
, Linnell Martinez, Gordy Grivna, Jason Doub, Ted Tessier, Guy urges, Wafer Dicing Using Dry Etching on Standard Tapes and Frames, available from: http://www.plasma-therm.com/pdfs/papers/Wafer-Dicing-Using-Dry-Etching-on-Standard-Tapes-and-Frames.pdf
[33] M.A. Lieberman, Plasma discharges for materials processing and display
applications, in: H. Schlu¨ ter, A. Shivarova (Eds.), Advanced technologies Based on Wave and Beam Generated Plasmas, NATO Science Series, Kluwer, Dordrecht, 67 , 1–22 (1999)
[34] Michael Quirk, Julian Serda, Semiconductor Manufacturing Technology
1st Edition, Upper Saddle River, NJ : Prentice Hall (2001)
[35] Yoshio Nishi, Robert Doering, Handbook of Semiconductor Manufacturing Technology, Second Edition, CRC Press (2007)
[36] Sami Franssila, Introduction to microfabrication, Second Edition, Chichester, West Sussex, England ; Hoboken, NJ : John Wiley & Sons, (2010)
[37] Annemie Bogaerts, Erik Neyts, Renaat Gijbels, Joost van der Mullen, Gas discharge plasmas and their applications, Spectrochimica Acta Part B: Atomic Spectroscopy, 57, 4, 609-658 (2002)
[38] N. Matsunami, Y. Yamamura, Y. Itikawa, N. Itoh, Y. Kazumata, S. Miyagawa, K. Morita, R. Shimizu, H. Tawara, Energy dependence of the ion-induced sputtering yields of monoatomic solids, Atom. Data Nucl. Data Tables 31, 1–80, (1984)
[39] Nastasi, M., J. W. Mayer, and J. K. Hirvonen, Ion Solid Interactions:
Fundamentals and Applications. Cambridge, MA: Cambridge University
Press (1996)
[40] Eisele, K. M. J. Electrochem. Soc. 128, 123 (1981)
[41] J.W. Coburn, H.F. Winters, Ion- and electron-assisted gas-surface
chemistry — an important effect in plasma etching, J. Appl. Phys. 50
, 3189–3195 (1979)
[42] S. Tachi: Proc. Symp. Dry Process, 8 (1983)
[43] A. Grill, Cold Plasma in Materials Fabrication: from Fundamentals to
Applications, IEEE Press, New York (1994)
[44] Kazuo Nojiri, Dry etching technology for semiconductors, Springer International Publishing (2015)
[45] Rikagaku Jiten, Physics and Chemistry Dictionary 3rd Edition, Iwanami
Shoten (1981)
[46] Tian, W.-C., J.W. Weigold, and S.W. Pang, Comparison of Cl2 and
F-based dry etching for high aspect ratio Si microstructures etched with
an inductively coupled plasma source, Journal of Vacuum Science and
Technology, B18, 4 (1890)
[47] D. L. Flamm, Mechanisms of silicon etching in fluorine and chlorine
containing plasmas, Pure Appl. Chem. 62, 9, 1709–1720 (1990)
[48] Yan Li, Deepak Goyal, 3D microelectronic packaging : from
fundamentals to applications, Springer International Publishing (2017)
[49] Catherine B. Labelle, Vincent M. Donnelly, Gregory R. Bogart, Robert
L. Opila, and Avi Kornblit, Investigation of fluorocarbon plasma
deposition from c-C4F8 for use as passivation during deep silicon
etching, Journal of Vacuum Science & Technology A: Vacuum, Surfaces,
and Films 22, 2500 (2004)
[50] B. Wu, A. Kumar, S. Pamarthy, High aspect ratio silicon etch: a review, J.
Appl. Phys. 108, 051101 (2010)
[51] R. Nagarajan, K. Prasad, L. Ebin, and B. Narayanan, Sens. Actuators, A
139, 323 (2007)
[52] B. Wu and A. Kumar, Appl. Phys. Lett. 90, 063105 (2007)
[53] M.J. Madou, Fundamentals of Microfabrication: The Science of
Miniaturization, 2nd ed, CRC Press, Boca Raton (2002)
[54] S. B. Jo, M. W. Lee, S. G. Lee, E. H. Lee, S. G. Park, and B. H. O, J.
Vac. Sci. Technol. A 23, 905 (2005)
[55] Ivo W. Rangelow, Critical tasks in high aspect ratio silicon dry etching
for microelectromechanical systems, American Vacuum Society, 21,
1550 (2003)
[56] C. K. Kang, S. M. Lee, I. D. Jung, P. G. Jung, S. J. Hwang, and J. S. Ko,
J. Micromech. Microeng. 18 (2008)
[57] Jae-Ho Min, Jin-Kwan Lee, and Sang Heup MoonChang-Koo Kim, Deep
etching of silicon with smooth sidewalls by an improved gas-chopping
process using a Faraday cage and a high bias voltage, Journal of Vacuum
Science & Technology B: Microelectronics and Nanometer Structures
Processing, Measurement, and Phenomena 23, 1405 (2005)
[58] Chienliu Chang, Yeong-Feng Wang, Yoshiaki Kanamori, Ji-Jheng Shih,
Yusuke Kawai, Chih-Kung Lee, Kuang-Chong Wu and Masayoshi
Esashi, Etching submicrometer trenches by using the Bosch process and
its application to the fabrication of antireflection structures, J.
Micromech. Microeng. 15, 580–585 (2005)
[59] A. A. Ayón, R. Braff, C. C. Lin, H. H. Sawin, and M. A. Schmidt, J.
Electrochem. Soc. 146, 339 (1999)
[60] M.J. Walker, Comparison of Bosch and cryogenic processes for
patterning high aspect ratio features in silicon. Proc. SPIE 4407, 89–99
(2001)
[61] Reza Abdolvand , Farrokh Ayazi, An advanced reactive ion etching
process for very high aspect-ratio sub-micron wide trenches in silicon,
Sensors and Actuators A, 144, 1, 109–116 (2008)
[62] J. Yeom, et al., Maximum achievable aspect ratio in deep reactive ion
etching of silicon due to aspect ratio dependent transport and the
microloading effect, J. Vac. Sci. Technol. B 23, 6, 2319–2329 (2006)
[63] M.A. Blauw, et al., Advanced time-multiplexed plasma etching of high
Aspect ratio silicon structures, J. Vac. Sci. Technol. B 20, 3106–
3110 (2002)
[64] M. Puech, et al., A novel plasma release process and a super high aspect
ratio using ICP etching for MEMS, in: Proceedings of the SEMICON,
Japan (2003)
[65] M. A. Blauw, T. Zijlstra, and E. V. D. Drift, J. Vac. Sci. Technol. B 19,
2930 (2001)
[66] C. B. Labelle, V. M. Donnelly, G. R. Bogart, R. L. Opila, and A.
Komblit, J. Vac. Sci. Technol. A 22, 2500 (2004)
[67] W.J. Parka, J.H. Kim, S.M. Choa, S.G. Yoon, S.J. Suha, D.H. Yoona,
High aspect ratio via etching conditions for deep trench of silicon,
Surface and Coatings Technology, 171, 290–295 (2003)
[68] Zheng Cui, Nanofabrication : principles, capabilities and limits, Springer
International Publishing (2017)
[69] Hwang, G.S., and K.P. Giapis, On the origin of the notching effect
during etching inuniform high density plasmas, Journal of Vacuum
Science and Technology, B15, 1, 70 (1997)
[70] Iqbal R. Saraf, Matthew J. GoecknerBrian E. Goodlin, Karen H.
R. KirmseCaleb T. Nelson, Lawrence J. Overzet, Kinetics of the
deposition step in time multiplexed deep silicon etches, J. Vac. Sci.
Technol. B 31, 011208 (2013)
[71] J. Yeom, Y. Wu, J. C. Selby, and M. A. Shannon, J. Vac. Sci. Technol. B
23, 2319 (2005)
[72] J. Yeom, Y. Wu, and M. A. Shannon, Transducers”03—The 12th
International Conference on Solid State Sensors, Actuators, and
Microsystems, IEEE, Boston, MA, USA, 2, 1631–1634 (2003)
[73] W. H. Juan and S. W. Pang, J. Vac. Sci. Technol. A 13, 834 (1995)
[74] Wong, Chiow San, Mongkolnavin, Rattachat, Elements of Plasma
Technology, SpringerBriefs in Applied Sciences and Technology (2016)
[75] Alexander Fridman, Alexander Fridman, Lawrence A. Kennedy,
Lawrence A. Kennedy, Plasma Physics and Engineering Second Edition,
CRC Press (2011)
[76] M. Tsuda, Plasma Process Technology for Semiconductor, Sangyo Tosho
Publishing Co., Ltd., 23 (1980)
[77] T. Iijima, S. Kondo, T. Aoyama: Plasma Technology, Beginner’s Books
Series 7, Kogyo Chosakai Publishing Co., Ltd. (1999)
[78] Y. Hatta, Gas Discharge, 2nd Edition, Kindai Kagaku Sha Co., Ltd.
(1971)
[79] IBM Research Division, T J Watson Research Center, Yorktown Heights,
Review of inductively coupled plasmas for plasma processing, J
Hopwood Plasma Sources Sci. Technol. 1, 109 (1992)
[80] R. J. Shul , S. J. Pearton, Handbook of Advanced Plasma Processing
Techniques, Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
(2000)
[81] M.A. Lieberman, A.J. Lichtenberg, Principles of Plasma Discharges and
Materials Processing, Wiley, New York (1994)
[82] Jae-Ho Min, Gyeo-Re Lee, Jin-kwan Lee, Sang Heup MoonChang-Koo
Kim, Dependences of bottom and sidewall etch rates on bias voltage and
source power during the etching of poly-Si and fluorocarbon polymer
using SF6, C4F8, and O2 plasmas, Journal of Vacuum Science &
Technology B: Microelectronics and Nanometer Structures Processing,
Measurement, and Phenomena 22, 893 (2004)
[83] Kuo-Shen Chen, Arturo A. Ayón, Senior Member, IEEE, Xin Zhang,
Member, IEEE, and S. Mark Spearing, Effect of process parameters on
the surface morphology and mechanical performance of silicon
structures after deep reactive ion etching (DRIE), Journal of
microelectromechanical systems, 11, 3 (2002)
[84] N Ranganathan, D Y Lee, L Ebin, N Balasubramanian, K Prasad, K L
Pey, The development of a tapered silicon micro-micromachining
process for 3D microsystems packaging, J. Micromech. Microeng. 18
(2008)
[85] R Li1, Y Lamy,W F A Besling, F Roozeboom, P M Sarro1, Continuous
deep reactive ion etching of tapered via holes for three-dimensional
integration, J. Micromech. Microeng. 18 (2008)
[86] K. J. Morton, G. Nieberg, S. Bai, and S. Y. Chou, Nanotechnology 19,
345301 (2008)
[87] Fu Y Q, Colli A, Fasoli A, Luo J K and Flewitt A J, J. Vac. Sci. Technol.
B27, 1520 (2009)
[88] Sergi Gomez, Rodolfo Jun Belen, Mark Kiehlbauch, Eray S. Aydil,
Etching of high aspect ratio structures in Si using SF6-O2 plasma,
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and
Films 22, 606 (2004)
[89] T. Tillocher, R. Dussart, X. Mellhaoui, P. Lefaucheux, M. Boufnichel, P.
Ranson, Silicon cryo-etching of deep holes, Microelectronic Engineering
84, 1120–1123 (2007)
校內:2023-07-13公開