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研究生: 李文恩
Li, Wen-En
論文名稱: 適用於具記憶效應之寬頻功率放大器線性化技術
Linearization Techniques for Wideband Power Amplifiers with Memory Effect
指導教授: 賴癸江
Lai, Kuei-Chiang
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電腦與通信工程研究所
Institute of Computer & Communication Engineering
論文出版年: 2019
畢業學年度: 107
語文別: 中文
論文頁數: 50
中文關鍵詞: 功率放大器頻譜增生記憶效應數位預失真器峰值因數削減方法線性化技術網格搜尋查詢表
外文關鍵詞: power amplifier, spectral regrowth, memory effect, digital predistortion, crest factor reduction, linearization techniques, grid search, look-up table
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  • 功率放大器為達到最佳的功率效益,大多操作在接近飽和區的地方,但是會受到嚴重的非線性響應,造成訊號失真,以及頻譜增生,對鄰近通道產生干擾;為了追求功率效益並維持系統的線性,主要有兩個研究方向,第一是改善電路設計,發展更進階的功率放大器,第二是透過訊號處理,延長功率放大器之線性區,又稱為線性化技術,另外,在高功率寬頻的系統下,記憶效應的影響也不再能被忽視。本論文結合峰值因數削減方法與數位預失真器,發展適用於具有記憶效應之寬頻功率放大器線性化技術,峰值因數削減方法為降低訊號峰均比之技術,數位預失真器則是於數位基頻中將傳送訊號預先做適當的補償,使功率放大器之輸出更線性。我們基於直接學習結構,發展結合廣義記憶多項式模型與網格搜尋之數位預失真器演算法,並與記憶多項式模型搭配查詢表的演算法,透過實際量測比較其效能,量測結果顯示廣義記憶多項式/網格搜尋的效能稍微優於記憶多項式/查詢表,但是有執行時間過長的缺點。我們也加入峰值因數削減方法,在進行數位預失真之前,先對訊號作峰值因數削減,量測結果顯示結合此兩種技術搭配使用能進一步降低對鄰近頻道的干擾,但會造成訊號額外的失真。

    In general, the RF power amplifier (PA) works near the saturation region to achieve maximum power efficiency. However, PA’s nonlinear response near the saturation region results in signal distortion and spectral regrowth that interferes with adjacent channels. To achieve a high power efficiency and maintain the linearity, there are two research directions. One is to improve circuit design and develop advanced PA architectures, and the other is to extend PA’s linear region by linearization techniques. Besides, the memory effect can not be ignored in the high-power, wideband system. In this thesis, we combine the crest factor reduction (CFR) technique and digital predistortion (DPD) to develop the linearization technique for wideband PAs with memory effect. The CFR technique reduces the peak-to-average power ratio (PAPR) of the signal, while DPD pre-compensates the transmitted signal in digital baseband so that the PA output has a linear behavior. Based on the direct learning architecture, we use the generalized memory polynomial (GMP) model and grid search to develop the DPD algorithm. The experimental results show that, compared with the direct learning DPD algorithm that is based on the memory polynomial (MP) model and the look-up table method, the proposed DPD algorithm has a better performance in adjacent channel leakage ratio (ACLR), but is much more time-consuming. In addition, we use the clipping and filtering technique to reduce the PAPR of the transmitted signal prior to DPD. The experimental results show that it further improves the ACLR performance at the cost of introducing more signal distortion.

    摘要 III Abstract IV 目錄 VIII 圖目錄 X 表目錄 XII 第一章 導論 1 1.1 前言 1 1.2 研究動機與目的 2 1.3 論文章節提要 3 第二章 研究背景 4 2.1 功率放大器 4 2.1.1 互調失真與頻譜增生 4 2.1.2 功率放大器之非線性特性 6 2.2 數位預失真器 8 2.2.1 線性化技術 8 2.2.2 數位預失真器之操作原理 8 2.3 非線性系統模型 10 2.3.1 Volterra series模型 [8] 10 2.3.2 Wiener模型 [8] 11 2.3.3 Hammerstein模型 [9] 12 2.3.4 記憶多項式模型 (Memory Polynomial Model) [9] 13 第三章 直接學習結構之記憶多項式數位預失真器 14 3.1 數位預失真器之學習結構 14 3.1.1 間接學習結構 [3] 14 3.1.2 直接學習結構 [4] 16 3.1.3 直接學習結構與間接學習結構之比較 17 3.2 實驗架構 18 3.2.1 基頻等效模型 vs 實驗模型 19 3.2.2 實驗架設 20 3.3 記憶多項式模型之數位預失真器 21 3.3.1 利用求根法設計數位預失真器 [6] 21 3.3.2 利用查表簡化求根法之數位預失真器 [1] 23 第四章 提出之演算法 25 4.1 動機 25 4.2 結合CFR與DPD之系統 25 4.2.1 峰值因數削減方法 (Crest factor reduction, CFR) 26 4.2.2 削減與濾波 (Clipping and filtering) [11] 27 4.2.3 經過CFR後的訊號 28 4.3 基於GMP模型之數位預失真器 29 4.3.1 廣義記憶多項式模型 [9] 29 4.3.2 提出之演算法 30 第五章 量測結果與分析 34 5.1 量測環境及參數 34 5.1.1 量測儀器與系統參數 34 5.1.2 實驗過程 35 5.2 量測結果 36 5.2.1 PA之非線性特性 36 5.2.2 使用記憶多項式模型之數位預失真器 [1] 38 5.2.3 使用廣義記憶多項式模型之數位預失真器 42 5.2.4 使用CFR輔助數位預失真器 44 第六章 結論與未來研究方向 48 參考文獻 49

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