| 研究生: |
黃詩喬 Huang, Shih-Chiao |
|---|---|
| 論文名稱: |
毫米波CMOS 低插入損耗變化之相移器及W- / K-band 射頻收發開關 Millimeter-Wave CMOS Low Insertion-Loss-Variation Phase Shifter and W- / K-band CMOS T/R Switches |
| 指導教授: |
莊惠如
Chuang, Huey-Ru |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電腦與通信工程研究所 Institute of Computer & Communication Engineering |
| 論文出版年: | 2014 |
| 畢業學年度: | 102 |
| 語文別: | 中文 |
| 論文頁數: | 76 |
| 中文關鍵詞: | 相移器 、射頻收發開關 、毫米波 、K與W頻段 |
| 外文關鍵詞: | Phase Shifter (PS), T/R Switches, Millimeter-Wave (MMW), K / W-band |
| 相關次數: | 點閱:109 下載:6 |
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本論文研製毫米波CMOS低插入損耗變化相移器及W-與K-band 射頻收發開關。低插入損耗變化之相移器採用TSMC CMOS 0.18-μm製程,應用於天線陣列系統,其主要架構是在180°反射式相移器輸出串接一個可切換180°相位差之切換式相移器,藉由切換180°切換式相移器使整體相位達到360°連續可調控之特性。K-與W-band 射頻收發開關則是分別採用TSMC 0.18-μm和TSMC 90-nm GUTM CMOS製程來進行設計,在應用上開關電路主要是切換射頻前端收發機中發射端與接收端路徑。W-band (75 - 110 GHz) 開關在本論文中共有兩個電路,第一個電路主體使用串-並式開關架構並使用基極浮接技術(body-floating)來改善插入損耗與線性度,此外搭配並聯電感諧振及洩漏訊號消除技術改善其隔離度;第二個電路使用串-並式開關設計,串聯路徑上使用雙並聯路徑來作為設計主體,同時將匹配的傳輸線利用彎折的方式來達到微小化的作用,並搭配基極浮接技術、並聯諧振電感與疊接電晶體等技術來改善其開關特性。而在K-band (15 - 30 GHz)開關設計主要利用一縮小化的堆疊式電感概念,藉由此電感大幅縮減整體電路面積,以利於整合。電路皆使用Agilent ADS與Ansoft 3-D全波電磁模擬軟體HFSS來進行模擬,晶片量測部分則採fully on-wafer方式進行量測。
This thesis presents the design of millimeter-wave (MMW) CMOS low-insertion loss phase shifters and W- / K-band CMOS T/R switches. The K-band phase shifter (PS) is fabricated using standard TSMC 0.18-μm CMOS technology. To achieve full 360° phase control, a (fixed) switch-type 180° phase shifter is applied to the continuous 180° reflection-type phase shifter for the phased-array antenna system. The K- and W-band T/R switches are fabricated using standard TSMC 0.18-μm and 90-nm GUTM CMOS technologies, respectively. The first W-band (75 - 110 GHz) switch is designed by using series-shunt structure with body-floating technique to improve the insertion loss and linearity performance. To enhance the isolation performance, the parallel inductor and leaking cancellation technique are adopted. The second W-band series-shunt type switch uses the double parallel-path structure. In addition, the body-floating, parallel inductor and stacked transistor techniques are used to improve the overall performance. In the K-band switch design, the chip size is much reduced by using the stacked inductor. All the measurements are performed by using the on-wafer measurement setup.
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