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| 研究生： |
洪勁宇 Hung, Chin-Yu |
|---|---|
| 論文名稱： |
以FPGA實現128位元AES硬體引擎搭配軟體金鑰隱藏技術應用於快閃記憶卡資料保護 FPGA Implementation of 128-bits AES Hardware Engine with Software Gold-Key Hidden Technique and Applications to Data Protection of Flash Memory Card |
| 指導教授： |
廖德祿
Liao, Teh-Lu |
| 學位類別： |
碩士 Master |
| 系所名稱： |
工學院 - 工程科學系 Department of Engineering Science |
| 論文出版年： | 2010 |
| 畢業學年度： | 98 |
| 語文別： | 英文 |
| 論文頁數： | 41 |
| 中文關鍵詞： | 金鑰隱藏 |
| 外文關鍵詞： | AES, FPGA |
| 相關次數： | 點閱：60 下載：0 |
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近年來數位資訊廣泛的應用於日常生活中，資訊安全變成數位生活裡非常重要的議題。在本篇論文中，我們提出一種新的應用，結合硬體資料加密和軟體資料隱藏(Data Hiding)技術，並透過讀卡機應用於快閃記憶卡(Flash Memory Card)上，實現資料保護的功用。資料加密採用AES-128加密標準，而硬體是由FPGA實現。硬體架構上，為了達到高效能的加密，我們充分利用FPGA內部Block RAMs作為運算資料緩衝區，可降低外部SRAM記憶體的容量需求。另外在金鑰隱藏技術部分，主要在電腦上以軟體執行。基於JPEG 2000漸進式傳輸(Progressive Transmission)特性，我們將金鑰(或者是讀卡機辨識碼)隱藏在JPEG 2000編碼的圖片中較不重要的位置，降低隱藏資料對圖片所造成的品質影響，並實現多種應用。在本論文中，是以硬體描述語言(VerilogHDL)來描述AES-128加密標準，再利用Xilinx Spartan-3 XC3S400 FPGA來實作。軟體則是以JasPer此程式作為JPEG 2000編解碼基礎，利用Visual Studio 2008開發使用者界面。
In recent years, digital information has been widely used in people’s daily life. Information security has become an important issue in digital life. In this thesis, we propose a new application, which combines hardware data encryption with software data hiding, and applies on a flash memory card through a card reader, aiming to achieve data protection. The 128-bit Advanced Encryption Standard (AES-128) is adopted in data encryption, and implemented on FPGA. To achieve a high-performance encryption, the hardware architecture fully utilizes Block RAMs in FPGA as data buffers, reducing the requirement for capacity of the external SRAM memory. In addition, the gold-key hidden technique is mainly implemented based on PC. For the reason that the progressive reconstruction property in JPEG 2000 image transmission, we embed the gold-key (or the identification of card reader) in the unimportant position, minimizing the loss of the quality caused by the hidden data, and accomplish the method in various applications. In this theory, we design the AES-128 by VerilogHDL, and implement it on Xilinx Spartan-3 XC3S400 FPGA. We also use JasPer as the basis of JPEG 2000 codec, and develop the GUI by Visual Studio 2008.
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[14] Michael D. Adams, “JasPer Software Reference Manual (Version 1.900.0)”, December 2006.
[15] Michael D. Adams, “The JPEG-2000 Still Image Compression Standard”, ISO/IEC JTC 1/SC 29/WG 1 N 2412, December 2005.
[16] Wei Liu. “Data Hiding in JPEG 2000 Code Streams”, Proc. IEEE ICIP, Vol. 3, pp. 1557-1560, October 2004.
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[18] Tanzilur Rahman, Shengyi Pan and Qi Zhang, “Design of a High Throughput 128-bit AES (Rijndael Block Cipher)”, Proc. of the International Multi-Conference of Engineers and Computer Scientists, Vol. 2, pp. 1217-1221, March 2010.
校內：2015-07-29公開校外：不公開