在本論文中，探討了具有淺溝槽隔離(STI)結構的P型通道橫向擴散金氧半場效電晶體(LDMOS)，受熱載子影響產生的退化及其機制與熱載子誘發之閘極氧化層完整性議題。
首先，描述高壓橫向擴散金氧半場效電晶體的優點以及其應用。研究接著陳述具有淺溝槽隔離的高壓橫向況散金氧半場效電晶體的熱載子可靠度議題的研究動機。此外，還會介紹熱載子效應、暫態崩潰(Q-BD)以及直接電流電流電壓 (DCIV)的基本原理。
接著，呈現本研究之元件結構的描述以及量測設定，也會介紹電性特性包含ID-VG以及IG-VG的量測方法。
在本文內容的主要部分，在加壓條件為閘極電流最大時且大的汲極電壓下，會記錄並且分析熱載子誘發之線性區汲極電流退化。 透過直接電流電流電壓以及電腦輔助模擬(TCAD)的分析後，熱載子誘發的傷害以及其產生的地點都能夠被決定。因此，兩階段式退化機制能夠被發展出來。第一階段的退化歸因於製程剩餘下的介面補陷的減少，第二階段則是歸因於加壓誘發之介面補陷和電子補陷的競爭。除此之外，閘極電流能與線性區汲極電流有很好的相關性。
最後一個部分，研究在閘極電流最大的加壓下之汲極端閘極氧化層之暫態崩潰。電子補陷產生了一些低電阻的電流路徑導致了暫態崩潰，而暫態崩潰可以產生對於電流設計的一些潛在性的問題。除此之外，時間相依介電質崩潰(TDDB)的分析也顯示了閘極電流能夠在崩潰時間預測實驗中扮演一個指標。

In the thesis, hot-carrier-induced degradation and mechanism as well as the gate oxide integrity issue of P-type high voltage lateral diffused metal-oxide –semiconductor (HVLDMOS) transistors with shallow trench isolation (STI) structure were investigated.
First, the advantages of HVLDMOS transistors and the applications of them were illustrated. The motivation of studying the hot-carrier-induced reliability issues of the HVLDMOS transistors with STI structure was presented. Moreover, the basic theories of the hot carrier effect (HCE), the quasi-breakdown (Q-BD), and direct current current-voltage (DCIV) technique were briefly introduced.
Next, the delineation of the device structure of our study and the measurement setup were presented. The measurement methodology of electrical characteristics including ID-VG & IG-VG was introduced.
In the main part of content, the hot-carrier-induced IDlin degradation under IGMAX stress with various stress drain voltage was recorded and analyzed. By means of DICV method and TCAD simulation, the type of damage and its location were able to be determined. Consequently, the two-stage degradation mechanism was developed. The reduction of residual-fabrication interface traps contributed to the first stage degradation. Besides, the competition between stress-induced interface traps and electron traps gave birth to the second stage degradation. Moreover, the gate current correlated well with the IDlin lifetime.
In the final part, under the IGMAX stress, the quasi-breakdown (Q-BD) happened in the drain-side gate oxide was inspected. The low-resistance paths induced by electron traps resulted in the Q-BD, which could cause potential problems of circuit design. Moreover, the time dependent dielectric breakdown (TDDB) analysis shown that the gate current was capable of an indicator of time to breakdown prediction test.

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Chapter 2
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Chapter 3
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Chapter 4
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