| 研究生: |
彭育原 Peng, Yu-Yuan |
|---|---|
| 論文名稱: |
奈米裂縫微影技術製造矽奈米線場效應電晶體 Fabrication of Silicon Nanowire Field-Effect Transistor using Nano-Crack Lithography |
| 指導教授: |
張允崇
Chang, Yun-Chorng |
| 學位類別: |
碩士 Master |
| 系所名稱: |
理學院 - 光電科學與工程研究所 Institute of Electro-Optical Science and Engineering |
| 論文出版年: | 2011 |
| 畢業學年度: | 99 |
| 語文別: | 中文 |
| 論文頁數: | 99 |
| 中文關鍵詞: | 奈米線 、場效應電晶體 、奈米裂縫微影技術 、感測器 、黃光微影 |
| 外文關鍵詞: | Nanowire, field effect transistor, FET,Nano-Crack Lithography, Sensor, Photo-Lithography |
| 相關次數: | 點閱:125 下載:0 |
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本論文中,將介紹一種發展中的新穎奈米結構製造技術,稱為奈米裂縫微影技術。藉由將樣品基板與光阻置入液態氮,其光阻圖形將因熱應力效應而產生奈米等級的裂縫線。其裂縫光阻圖形將可在後續蒸鍍金屬的製程中當作蒸鍍阻擋層,並且在舉離之後可在原先裂縫處得到金屬奈米線。而所選擇較理想的光阻圖形為bowtie形狀,因其裂縫較容易發生在其腰身最脆弱處的方向。有好幾項重要的參數可控制裂縫產生的結果,包括了bowtie的大小以形狀,經由實驗可將參數選擇至較適合的狀態。其金屬線線寬目前成功製作可小至約160nm、長為15μm。若將金屬線進行熱退火步驟將能成功製作出奈米虛線結構。而以裂縫光阻當作蝕刻阻擋層,將可成功製作出SiO2的奈米溝槽結構。
利用上述新穎的奈米裂縫微影技術搭配黃光微影製程,也可成功製作出矽奈米線場效應電晶體。製程中,在絕緣層上矽(SOI)基板上使用裂縫微影技術產生鉻金屬或者是鎳金屬奈米線,將其作為後續蝕刻矽的蝕刻阻擋層。在矽的濕式蝕刻步驟後,將可一併將矽奈米線連結至電極區的圖形定義,而其元件則可在製作金屬電極後完成。其一般常見的場效應電晶體特性分析與重要參數,則一併被整理與呈現。
總結來說,在這篇論文中介紹了以奈米裂縫微影技術製作一維的奈米結構,並且成功將其發展至矽奈米線場效應電晶體的製作上。相信這樣的技術在未來在奈米光電與生物醫學領域可以找到重要的發展與應用。
In this dissertation, a novel nanofabrication technique, which is referred as Nano-Crack Lithography is developed. The nanoscale fracture line within a photoresist pattern occurs after thermal stressing caused by immersing the sample into liquid nitrogen. The cracked photoresist pattern is used as a shadow mask for the subsequent metal evaporation and metal nanowire reveals after stripping off the photoresist. Bowtie pattern is the preferred pattern because it tends to crack along the neck direction. Several important parameters, such as the sizes and shapes of the photoresist pattern is also studied and optimized. Metal nanowires that are as narrow as 160 nm and 15 micron long are successfully fabricated. Thermal annealing of the metal nanowire causes the nanowire to morph into nano-dot lines. Nanoscale SiO2 trenches are also fabricated by SiO2 etch through the cracked photoresist pattern.
Silicon nanowire field-effect transistor is demonstrated using novel Nano-Crack Lithography. In the beginning, Cr or Ni nanowires are fabricated using Nano-Crack Lithography on top of silicon-on-insulator substrates and act as hard mask for the subsequent wet silicon etching. The fabricated silicon device has already connected to the electrode during the fabrication process. The fabrication is completed after the contact pad fabrication. Typical electrical characterizations are performed and important parameters are extracted.
In summary, Nano-Crack Lithography is developed to fabricate one-dimensional nanostructure in this research. Nanoscale silicon field-effect transistors are successfully fabricated. Future development of these techniques can find important applications in the fields of Nanophotonics and biosensing.
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校內:2014-07-01公開