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研究生：	葉星佑 Yeh, Hsing-Yu
論文名稱：	用於流量分類及網路入侵偵測的FPGA加速之深度學習框架 An FPGA-Accelerated Deep Learning Framework for Flow Classification and Network Intrusion Detection
指導教授：	張燕光 Chang, Yeim-Kuan
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 資訊工程學系 Department of Computer Science and Information Engineering
論文出版年：	2024
畢業學年度：	112
語文別：	英文
論文頁數：	66
中文關鍵詞：	深度學習、網路入侵偵測、現場可程式化邏輯閘陣列、特徵選擇、超啟發式演算法、流量分類、AMD Vitis AI 、CSE-CICIDS2018
外文關鍵詞：	Deep learning, Network intrusion detection, feature selection, Vitis AI, flow classification, Field programmable Gate array, CSE-CICIDS2018, Metaheuristic algorithm
相關次數：	點閱：109 下載：0
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摘要 i
Abstract ii
誌謝 iv
TABLE OF CONTENTS v
LIST OF TABLES viii
LIST OF FIGURES ix
Chapter 1 Introduction  1
Introduction 1
Organization of the Thesis 3
Chapter 2 Background 4
1 Intrusion Detection 4
2 Artificial Intelligence 5
3 Flow Classification 6
4 Machine Learning 6
5 Signatured-Based Intrusion Detection System 8
6 Anomaly-based Intrusion Detection System 9
7 Intrusion Detection Dataset 10
7.1 Well-Known datasets 10
7.2 CICIDS2017, CSE-CICIDS2018, CICDDOS2019 11
8 Feature Selection 12
8.1 Information Gain 13
8.2 Dimensionality Reduction  13
8.3 Metaheuristic  14
9 Computation Resource 15
9.1 Central Processing Unit 16
9.2 Graphics Processing Unit  16
9.3 Neural Processing Unit 16
9.4 Tensor Processing Unit 17
9.5 Accelerated Processing Unit 17
9.6 Apple Silicon  18
9.7 Deep Learning Processing Unit 18
10 Embedded Deep Learning 19
10.1 Model Compression 19
10.1.1 Quantization  19
10.1.2 Pruning  20
10.1.3 Other Compression techniques 21
10.2 Tensor Virtual Machine  21
10.3 AMD Vitis™ AI 22
Chapter 3 Related Work  25
1 Feature Selection and Explanation Techniques 25
2 Neural Network Architectures  26
3 Efficient Neural Network Designs 27
4 FPGA-Based Deep Learning Acceleration  28
Chapter 4 Method 30
1 Motivation 30
2 Data Preprocess 31
3 Features Selection  32
3.1 Genetic Algorithm  32
4 Model Selection  32
4.1 Convolution Neural Network  33
4.2 ResNet34  34
4.3 Temporal Convolution Network 34
4.4 EfficientNetV2S  35
5 Model Adjustment for DPU Supported Operation 35
6 Train 36
7 Model Quantization  37
8 Model Compilation  37
9 Evaluate  38
10 Model Deployment on Zynq UltraScale+ MPSoC ZCU104  38
11 Performance Evaluation Across Heterogeneous Platforms 38
Chapter 5 Experimental Results  40
1 Experimental Environment  40
2 CSE-CICIDS2018 42
3 Models  45
4 Experimental Results Inference Metrics 47
Chapter 6 Conclusion 51
References 52
                                    

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校內：2029-08-25公開
校外：2029-08-25公開電子論文尚未授權公開，紙本請查館藏目錄

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