在本篇論文中，提出了無摻雜鍺鰭式電晶體結構，與傳統電晶體最大的不同在於省去離子佈植所耗費的時間及成本，也避免後續活化退火所帶來的高溫熱預算影響，因此製程溫度可維持400 ℃以下。在無法利用高濃度摻雜來降低接觸電阻的情況下，我們使用不同的金屬來分析電性的差異，最後成功完成無摻雜鍺鰭式電晶體之研製，展現了1000以上的電流開關比例，Ion達5.9 µA/µm,次臨界搖擺斜率(SS)為66 mV/dec。本研究也討論了無摻雜元件特有的極性轉換特性，利用背板電極施加偏壓改變通道和汲/源極能帶彎曲來調變元件特性，成功實現在同一顆元件具有P型及N型電晶體的導通特性。最後利用鎳以及鈦作為接觸金屬，經過熱退火後，在無摻雜情況下完成了反相器的電路,也成功量測出VTC轉換曲線，電壓增益可達約22 V/V，驗證此無摻雜鰭式電晶體可實際應用於邏輯電路之中。

In this thesis, the Ge dopingless FinFETs are proposed and demonstrated experimentally. The major difference from the conventional transistor is no intentional doping or ion implantation required, and thus the impacts of high-temperature activation annealing can be avoided. Since no heavy doping in the dopingless FETs is employed for the reduction of the contact resistance, we use different source/drain (S/D) work-function metals to improve the electrical performance. The Ge dopingless FinFETs with ION/IOFF ratio more than 1000, Ion = 5.9 µA/um and SS = 66 mV/dec are successfully achieved. This study also shows the unique conversion characteristics of carrier conduction in the dopingless devices. Using the sub-gate bias applied to tune the band bending of channel and S/D regions, the polarity of device electrical conduction can be modulated. P-type and n-type transistors in the same transistor through the sub-gate biases are accordingly achieved. Finally, nickel and titanium are used as the S/D contact metals for p- and n-FETs, respectively. The CMOS inverter is therefore fulfilled without intentional doping. Desirable voltage transfers characteristics (VTC) with the maximum voltage gain of 22 V/V are achieved, indicating that the dopingless Ge FinFET is promising and can be applied for practical logic device applications.

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