本論文關注於2.4 GHz ISM頻段及2.87 GHz的射頻前端接收機子電路的設計。論文內容主要分為兩個部分：第一部分2.4 GHz低雜訊放大器的設計；第二部分為為低相位雜訊2.87 GHz CMOS LC壓控振盪器的設計。所設計的電路皆使用 TSMC 0.18-µm CMOS 製程實現，操作電壓為 1.8V，兩顆晶片除了在TSRI做室溫下的量測，也透過實驗室的極低溫量測環境測試在極低溫下的特性以作為相關於前瞻量子位元讀取電路應用的前期探討。
2.4 GHz高線性度低雜訊放大器的設計主要是透過額外一顆MOS做出分流路徑來增加放大器的線性度，使用一級的放大器架構達到10.78的gain值，因此無串接多級的架構，NF做到5dB，Input matching為-37 dB，而IIP3為相對較好的-11。
在低相位雜訊2.87 GHz LC壓控振盪器的設計採用了CMOS架構以減少消耗功率，並且在共模點使用一組LC濾波架構來濾除雜訊讓相位雜訊表現更好；在共振腔的部分，可變電容使用MOS varactor，選擇適當偏壓和尺寸下，得到較佳的Q值，以達到較佳的phase noise表現。根據量測結果，壓控振盪器核心消耗功率為 10.5 mW，頻率可調範圍為 19.5 %，1MHz 偏移處的相位雜訊在可調頻率範圍內最佳為-117.6 dBc/Hz 。
外太空衛星通訊和深海水中通訊，可能會面臨極端低溫環境的挑戰，在最後介紹了極低溫下的應用以及極低溫量測環境的操作說明，接著量測上述兩顆晶片在極低溫下與常溫下的表現差異並探討。

This thesis focuses on the design of RF front-end receiver subcircuits for the 2.4 GHz ISM band and 2.87 GHz. The paper content is mainly divided into two parts: the first part is the design of a 2.4 GHz low-noise amplifier; the second part is the design of a low-phase noise 2.87 GHz CMOS LC voltage-controlled oscillator. The designed circuits are all implemented using TSMC 0.18-µm CMOS process with an operating voltage of 1.8V. In addition to being measured at room temperature at TSRI, the two chips are also tested in the laboratory's ultra-low temperature measurement environment to test their characteristics at extremely low temperatures as a preliminary study on the application of forward-looking quantum bit readout circuits.
The design of the 2.4 GHz high linearity low noise amplifier mainly uses an additional MOS to make a shunt path to increase the linearity of the amplifier. A single-stage amplifier architecture is used to achieve a gain value of 10.78, so there is no cascaded multi-stage architecture. The NF is 5dB, the Input matching is -37 dB, and the 〖"IIP" 〗_"3" is a relatively good -11 dBm.
The design of the low phase noise 2.87 GHz LC voltage-controlled oscillator adopts a CMOS architecture to reduce power consumption, and uses a set of LC filter architectures at the common mode point to filter noise for better phase noise performance; in the resonant cavity, the variable capacitor uses a MOS varactor, and the appropriate bias and size are selected to obtain a better Q value to achieve better phase noise performance. According to the measurement results, the core power consumption of the voltage-controlled oscillator is 10.5 mW, the frequency adjustable range is 19.5%, and the phase noise at 1MHz offset is the best -117.6 dBc/Hz within the adjustable frequency range.
Satellite communications in outer space and deep sea water communications may face the challenge of extremely low temperature environments. Finally, the application under extremely low temperature and the operation instructions of extremely low temperature measurement environment are introduced. Then the performance difference of the above two chips under extremely low temperature and normal temperature is measured and discussed.

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