穿隧式場效應晶體管有潛力在室溫下克服傳統金氧半場效電晶體的亞閾值斜率極限。它們允許進一步縮小集成電路的電源電壓、閾值電壓和功耗。I-V 族TFET 的主要挑戰之一是由於聲子輔助隧穿通過大的間接帶隙而導致的導通電流不令人滿意。本文致力於討論 IV 族半導體中的直接和間接帶間穿隧效應。儘管 Ge 和 SiGe 具有更小的帶隙和更輕的載流子有效質量，但理論和實驗結果不能令人滿意。為了進一步提高 TFET 性能，在 IV 族半導體中開發直接 BTBT是一種很有前途的方法。 GeSn 已成為一種有前途的替代合金，可在 IV 族材料中實現可調直接帶隙。通過增加 Sn 濃度，弛豫 GeSn 合金的帶隙表現出從間接到直接的轉變。此外，GeSn 比 Ge 具有更小的帶隙和更輕的載流子有效質量。在本論文中，我將討論 GeSn 的場效應晶體。在這項研究中，我們利用
8-k·p 模型來計算 GeSn 能隙和有效質量。此外，考慮了非拋物線、多谷和量子尺寸侷限的效應，我們還探索了 GeSn 物理特性。最後，利用 TCAD 模擬，對包括 TFETs、PNIN TFETs 和 MOSFET 在內的 GeSn 特性進行比較。
我們還分別通過模擬和測量方法分析了功率元件、橫向溝槽式閘極金氧半場效電晶體的電性。在模擬部分，我們使用 Sentaurus TCAD 首先創建了橫向溝槽式閘極金氧半場效電晶體的結構，然後研究了改變氧化溝槽的介電常數對電特性的影響。我們發現，與相對介電常數為 3 ~ 3.9 的最大抗擊穿度相比，氧化物溝槽的相對較高和較低的介電常數都會降低崩潰電壓。這是因為相對較高和較低的介電常數會導致電場過度集中在角落，導致元件較早崩壞。

The Tunnel Field-Effect Transistor (TFET) has the potential to improve upon the limitations of traditional Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) at room temperature. This is because TFETs allow for a reduction in the supply voltage, threshold voltage, and power consumption of integrated circuits. However, one of the main challenges facing Group-IV-based TFETs is the low on-current due to phonon-assisted tunneling in large indirect bandgaps. This article focuses on discussing direct and indirect band-to-band tunneling in Group-IV semiconductors. Although Ge and SiGe have smaller bandgaps and lighter effective masses, their improvement remains unsatisfactory. One promising approach to enhance TFET performance is the exploitation of direct BTBT in Group-IV semiconductors. GeSn has emerged as a promising alternative to achieve tunable direct bandgap among Group IV materials. By increasing the Sn concentration, the bandgap of relaxed GeSn alloys transitions from indirect to direct. This study utilizes an 8-k·p model to calculate the GeSn energy bandgap and effective mass, as well as its physical properties, such as nonparabolicity, multi-valley, and quantum size confinement. The study also simulates and compares GeSn-based TFETs, PNIN TFETs, and MOSFET devices using TCAD. Additionally, the electrical characteristics of power devices and lateral trench gate MOSFETs are analyzed through simulation and measurement methods. The simulation part uses Sentaurus TCAD to create the structure of the lateral trench gate MOSFET and investigate the impact of changing the oxide trench’s dielectric constant on its electrical characteristics. Results show that relatively high and low dielectric constant decreases the breakdown voltage compared to a maximum breakdown immunity with a relative dielectric constant of 3 to 3.9. This is because high and low dielectric constant causes an excessive concentration of electric fields at corners, leading to early device breakdown.

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