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研究生：	陳偉偉 Chen, Wei-Wei
論文名稱：	使用多路徑濾波技術之開關鍵控及頻率鍵移調變喚醒接收機 A FSK/OOK Wake-up Receiver Using N-Path Filtering Techniques
指導教授：	鄭光偉 Cheng, Kuang-Wei
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電腦與通信工程研究所 Institute of Computer & Communication Engineering
論文出版年：	2019
畢業學年度：	107
語文別：	英文
論文頁數：	90
中文關鍵詞：	低功率、喚醒接收機、開關鍵控、頻率鍵移、多路徑技術、轉導電容濾波
外文關鍵詞：	low-power, WuRx, OOK, FSK, N-path technique, gm-C filter
相關次數：	點閱：112 下載：3
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在無線感測網路與物聯網應用發展呈爆炸性成長的當下，感測節點的數量越來越多，許多新技術也油然而生。為達到高密度節點分部與良好的能量使用效率，一低功耗、小尺寸與高靈敏度之喚醒接收機期待被實現。喚醒接收機可隨時監控發射節點訊號，在收到聯絡請求時喚醒接收節點之主接收機，非聯絡狀態時主接收機則保持睡眠模式，達到節能之目的。
本論文提出一低功耗、可做開關鍵控及頻率鍵移訊號之解調，並且採用多路徑技術進行抗干擾與解調變之喚醒接收機。其中首級低雜訊放大器與堆疊式混頻器共用了電流，此設技優化了功率消耗並減輕本地振盪器的負擔。使用多路徑技術可取代掉傳統巨大、高品質因數之外部元件，並提供良好的帶通濾波效果。此外，多路徑技術也用於解調電路，搭配轉導電容濾波器來位移中心頻率，讓頻率使用更富彈性。本晶片使用90奈米互補式金屬氧化物半導體製程製造，工作於433百萬赫茲（ISM頻段）、資料傳輸率為每秒100千位元，在進入解調變電路前之增益為65 dB，預期能達到−100 dBm的靈敏度，此晶片操作在1伏特工作電壓下，消耗200微瓦。

Nowadays, there is an explosive growth of development in wireless communication applications such as IoTs (internet of things) or WSNs. More and more sensor nodes are needed, giving rise to diverse requirements and new techniques. To meet the requirements of dense deployment of sensor nodes and good energy efficiency, a low-power, small-area, and high-sensitivity wake-up receiver (WuRx) is expected to be implemented. A WuRx continuously monitors the communication requests from transmitting nodes. Only when receiving a request, the WuRx wakes the main receiver up. The main receiver remains asleep in the intervals of communication to optimize the power efficiency.
This thesis proposes a low-power, OOK/FSK wake-up receiver using N-path technique for interference immunity and demodulation. The ingenious design of the LNA and stacked mixer optimizes power consumption and alleviates the burden of local oscillator. By the use of N-path filter rather than bulky, external, high-Q devices, it can provide a high-Q band-pass response. The N-path technique is also used in demodulator and aided by the gm-C filter to shift the center frequency. Implemented in 90 nm CMOS process, the WuRx operating in 433 MHz (ISM-band) with 100-kb/s input has a conversion gain before the demodulator of 65 dB and an expected sensitivity of −100 dBm, while consuming 200 μW under a 1-V supply voltage.

List of Figures	X
List of Tables	XIV
Introduction	1
1. WSN Implementation Requirements	1
2. Duty-Cycle Control in Sensor Networks	2
3. Wake-up Receiver Design Considerations	5
3.1. Power Consumption and Data Rate	5
3.2. Sensitivity	5
3.3. Functional Specifications	6
4. Thesis Organization	8
Introduction of Wake-up Receiver System	9
1. State-of-The-Art Wake-up Receivers	9
1.1. Envelope Detection Architecture	9
1.2. Super-Regenerative Architecture	10
1.3. Low-IF Architecture	11
1.4. Uncertain-IF Architecture	12
1.5. N-Path Filter Based Architecture	13
2. Conclusions	14
Proposed N-Path Filter Based WuRx	15
1. WuRx Architecture	15
1.1. Frequency Plan	19
2. N-Path Passive Filter	20
2.1. Paralleled 4-Path Passive Filter	21
2.1.1. 4-Path Filter Used in IF1 Band	27
2.1.2. 4-Path Filter Used in Demodulator	30
2.2. gm-C Frequency Shift Technique	31
2.2.1. gm-C Technique Applied in N-Path Filter1 (IF1 band)	33
2.2.2. gm-C Technique Applied in N-Path Filter3 (Demodulator)	34
3. WuRx Front-End Sub-Circuits	35
3.1. Differential gm-boost CG LNA with Current-Reuse Stacked Mixer	35
3.1.1. LNA Structure Selection	47
3.2. IF-Amplification Chain	50
3.2.1. Variable-Gain Amplifier	50
3.2.2. IF2 Amplifier	52
3.3. Dual-Mode Demodulator	53
3.3.1. Envelope Detector	53
3.3.2. Pre-Amplifier	58
3.4. Local Oscillator and Clock Generator	63
3.4.1. 4-Stage Ring Oscillator	63
3.4.2. Frequency Divider and Clock Generator	66
4. Simulations of The Proposed WuRx System	70
4.1. Layout Implementation	70
4.2. Simulation Results	71
Measurements	78
1. Experimental Setup	78
2. Measurement Results	81
Conclusions and Future Works	85
1. Conclusions	85
2. Future Works	85
2.1. Circuit Implementation	85
2.2. LO Generation	86
2.3. Synchronous Clock	86
2.4. QPSK Demodulation	86
Bibliography	88


                                    

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校內：2024-07-23公開
校外：2024-07-23公開

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