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研究生: 鄭允中
Cheng, Yun-Chung
論文名稱: 在TCAD上模擬 40nm 技術的Bulk電晶體的射頻性能研究
40nm technology Bulk MOSFET RF performance investigation on TCAD
指導教授: 江孟學
Chiang, Meng-Hsueh
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 微電子工程研究所
Institute of Microelectronics Engineering
論文出版年: 2023
畢業學年度: 111
語文別: 英文
論文頁數: 38
中文關鍵詞: MOSFET 、TCAD 、RF 、Figure of Merit 、Parasitic Capacitance 、Gate Resistance
外文關鍵詞: MOSFET, TCAD, RF, Figure of Merit, Parasitic Capacitance, Gate Resistance
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  • RF應用,例如LNA、VCO、MIXER等,可以與一般製程無縫整合,從而顯著降低晶片封裝成本。為了在RF應用中獲得更大的設計餘地,有必要研究MOSFET如何提高RF性能指標(FOMs)。
    本研究的重點是探索MOSFET的結構調節,從小訊號模型推斷出它們如何影響直流和射頻特性。根據實證觀察,截止頻率(Ft)大致與1/Lg^2成正比,表明隨著製程節點的進步,Ft呈現增加的趨勢。
    本研究的主要重點是調查特定的結構調節如何影響MOSFET的射頻性能。採用TCAD模擬,並參考40nm技術測試鍵的測量數據。這種方法相較於純模擬提供了更可靠的見解。由這些實驗得出的趨勢可以為應用於RF晶片的MOSFET提供有價值的設計指南。

    RF applications such as LNA, VCO, MIXER, etc., can be seamlessly integrated with general fabrication processes, leading to significant cost reductions in chip packaging. To achieve greater design margin in RF applications, it is imperative to investigate how MOSFETs can enhance RF figures of merit (FOMs).
    This research focuses on exploring how the structural modulation of MOSFETs, as inferred from small-signal models, can impact the DC and RF characteristics. It is known from empirical observations that the cut-off frequency (Ft) is approximately proportional to 1/Lg^2, indicating a trend of increasing Ft as process nodes advance.
    The main emphasis of this study is to investigate how specific structural modulations influence MOSFET RF performance. TCAD simulations are employed, along with reference to the measurement data of 40nm technology test keys. This approach offers more reliable insights compared to pure simulations. The resulting trends from these experiments can provide valuable design guidance for MOSFETs employed in RF chip applications.

    摘要 I Abstract II Contents V Figure Captions VII Table Captions VIII Chapter 1 Introduction 1 1.1 Background 1 1.2 Motivation 1 1.3 Introduction of Simulation Tools 3 1.4 Overview of the Thesis 4 Chapter 2 Review of RF Characteristic for planar MOSFET 5 2.1 Planar MOSFET Structure 5 2.2 Parasitic Parameter 6 2.2.1 Gate Resistance 6 2.3 small-signal equivalent model of the MOSFET 7 2.3.1 Y parameter and small-signal key parameters extracting 7 2.3.2 Extracting results from TCAD Y-parameter 9 2.4 Figure of Merit of RF MOSFET 9 2.4.1 Ft 12 2.4.2 Fmax 13 Chapter 3 Device Design and Simulation 15 3.1 Device Design 15 3.2 Model Used in the Device Simulation 18 3.2.1 Mobility model used in TCAD physics 19 3.3 Impact of Modification on FoM(Ft, Fmax) 22 3.3.1 Effect of the device Spacer width 23 3.3.2 Effect of the substrate doped 25 3.3.3 Effect of the LDD doped 29 Chapter 4 Conclusion 33 Chapter 5 Future work 34 References 35 Appendix 37

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