氧化層覆蓋的高阻值矽基板會有矽表面形成載子通道的問題，這將引起可觀的基板損失。基板損失是不利於射頻或微波被動元件之品質因子，藉由使用表面鈍化的高阻矽基板可以壓抑基板損失，以獲得高品質因素之被動元件。整合式被動元件(IPD) 技術是系統級封裝(SiP)的一個解決方案。藉此技術，高品質的被動元件可以被製造在一基板上，然後利用覆晶微凸塊鍵合方式與其他電路連接整合。表面鈍化的高阻矽基板是適用於系統級封裝技術的基板。
本論文之目的是探討使用不同製備方法製作之表面鈍化層(surface-passivation layer)的鈍化能力。透過有效電阻率(ρeff)的萃取，可以評估表面鈍化層的鈍化能力。實驗結果顯示，較小晶粒的表面鈍化層，也就是每單位體積較大的晶粒邊界，會在矽表面形成較高密度的載子陷阱，使得表面載子通道被抑制，進而更有效的減低基板損失。另一方面，由於納米結構之納米矽提供了更高之缺陷濃度，因此降低基板損耗，
所以我們也藉此證明了熱絲化學氣相沈積(HWCVD)的奈米矽晶粒提供良好的表面鈍化能力。此外也實際製作單一線圈的電感去證實有奈米矽鈍化層之高阻值基板可以得到較高的品質因素。
本論文主要分成四大部分： (a)討論不同厚度之多晶矽鈍化層與不同退火成長矽基鈍化層對於矽基板損失與串音效應的影響； (b)製備奈米矽晶薄膜作為高阻值矽基板之鈍化層及它對傳輸特性影響的研究； (c)製作單圈平面式電感於各種矽表面鈍化層的矽基板上並比較他們的品質因子； (d)帶通濾波器設計與製作。各種的多晶矽表面鈍化層可直接用低壓氣相沈積法成長或是由電漿輔助氣相沈積法成長的非晶矽，透過爐溫退火或雷射退火等方式轉化而成。我們使用共平面波導(CPW)傳輸線的結構來特性化並比較各種矽表面鈍化層抑制矽表面載子通道的能力。
(a)在第一部分中，探討不同厚度之多晶矽鈍化層與不同熱退火成長之多晶矽鈍化層，對於矽基板上CPW傳輸線的傳輸損失與串音效應之影響。在製程上，我們使用高阻值矽晶作為基板(ρSi = 1~5 kΩ-cm)；利用LPCVD直接成長多種不同厚度之多晶矽。此外，退火而成的多晶矽則是由PECVD成長100 nm之非晶矽於高阻值基板上，經過爐管或另兩種不同準分子雷射以退火方式轉化而成具。隨後，PECVD成長300 nm氧化膜，利用電子束蒸鍍的1.2 μm之CPW金屬結構再依序的被沈積在此表面鈍化的矽基板上。實驗結果顯示，較厚的多晶矽會有較低的傳輸損失，而且退火轉化而成的多晶矽可以提供1.16 dB/cm傳輸損失的良好表面鈍化能力。
(b)在第二部分中，本論文提出一種HWCVD沈積的奈米級矽(nc-Si)以作為高阻值矽基板的表面鈍化層。100 nm厚的nc-Si及其他方式形成的多晶矽被使用作為高阻值矽基板之表面鈍化層，量測並比較被氧化矽覆蓋的這些被表面鈍化之高阻值矽基板上的CPW傳輸線之傳輸損失與串音干擾。以nc-Si作為矽表面鈍化層，其傳輸損失是最低的，而且在低於20 GHz的頻率範圍內，傳輸損失可低於1.05 dB/cm。可準確地確認該奈米矽晶表面鈍化膜可以有效的改善矽基板損失與串音效應。此外，nc-Si厚度對傳輸損失的影響也被研究，實驗結果顯示，較厚的nc-Si會有較低的傳輸損失，400 nm厚的nc-Si矽表面鈍化層可將傳輸損失降低至0.69 dB/cm。
(c)在第三部分中，製作單圈平面式方形與八邊形的電感於不同矽基表面鈍化層之高阻值基板上，它們的品質因子被使用來評估不同表面鈍化之矽基板，實現具高品質因子之電感的能力。實驗結果顯示，使用nc-Si作為表面鈍化層可有最好的品質因子值，在20 GHz時的Q值為23.6，此值與無表面鈍化之矽基板上的電感比較，增加了69.44 %。
(d)在第四部分中，本論文提出兩種高效能的帶通濾波器，第一種為具有傳輸零點之雙模態帶通濾波器，使用直角交錯開槽之平面共振器結構，並具有一對方形蝕孔的擾波元件。第二種為具有雙頻帶之雙模態帶通濾波器。此兩種帶通濾波器具有良好的通帶外抑制能力、更佳的通帶選擇性(High selectivity)、較低的植入損失(Low insertion loss)、良好的截止帶訊號抑制(Good stopband suppression)、以及電路面積的縮小化(Reduced circuit size)。

Oxide-coated high-resistivity silicon (HR-Si) substrates suffer from carrier channel in the silicon surface, which brings about significant substrate losses. The substrate losses are detrimental to the quality factor of radio-frequency or microwave passive components and should be suppressed by using surface-passivated HR-Si substrate in order to obtain high values of quality factor. The integrated passive device (IPD) technology is a system in package (SiP) solution where passive devices with high quality can be fabricated on a substrate and then connected with another circuit chip by using flip-chip micro-bump bonding. It is well known that the surface-passivated HR-Si is a substrate suitable for IPD technology.
The purpose of dissertation is to explore the passivation ability of the various surface-passivation layers (SPLs) generated by different fabrication methods. By extracting the substrate effective resistivity (ρeff), the passivation ability is assessed. The experiment results indicate that the SPL of smaller grain size, i.e. the larger grain-boundary area per unit volume, results in the higher carrier trap concentration at the silicon surface, hence the surface carrier channel is suppressed and then substrate losses are more effectively reduced. On the other hand, it was found that the nanocrystalline silicon (nc-Si) film deposited by hot-wire chemical vapor deposition (HWCVD) provides an excellent surface-passivation ability and hence lowers substrate loss, because the nanostructure of nc-Si provides a higher trap concentration. Furthermore, one-turn spiral inductors were fabricated and measured in order to prove that the HR-Si substrate with an nc-Si SPL can indeed provide a high quality factor.
The dissertation has 6 chapters and is divided into four parts: (1) the dependence of transmission loss and crosstalk on the thickness and on the preparation method of a polysilicon (poly-Si) SPL on HR-Si substrates, (2) the preparation of nc-Si as an SPL of the HR-Si substrate and the study of its effect on transmission characteristics, (3) comparison of the quality value (Q) value of one-turn planar inductors on oxidized HR-Si substrates with different SPLs by using coplanar waveguide (CPW) feeds, (4) design and measurement of the passive circuits such as filters. In this work, various poly-Si SPLs were prepared by low pressure chemical vapor deposition (LPCVD) or by different annealing method such as furnace annealing or laser annealing of amorphous silicon (α-Si) layers, which was deposited by plasma-enhanced chemical vapor deposition (PECVD). The CPW transmission lines were used to characterize and compare the ability of these SPLs to suppress the surface carrier channel of silicon substrates.
In part 1, we investigated the effects of poly-Si thickness and the different annealing method of forming poly-Si layers on transmission loss and crosstalk effect of CPW lines on SiO2-coated HR-Si substrates (ρSi = 1~5 kΩ-cm). The LPCVD was used to deposit poly-Si films. For the annealed poly-Si, the PECVD was used to deposit -Si and then was transform into the poly-Si through furnace annealing and exciter laser annealing. A 300nm-thick SiO2 by PECVD and 1.2um-thick CPW metal by e-beam evaporation were in turn deposited on the surface-passivated HR-Si substrates. The experiment results show that the thicker poly-Si results in the lower transmission loss and the annealed poly-Si provide good passivation ability with a transmission loss of 1.16 dB/cm.
In part 2, we propose an HWCVD-deposited nc-Si as an SPL for SiO2-coated HR-Si substrates. The transmission loss and crosstalk of CPW lines on the SiO2-coated HR-Si substrate with a 100 nm nc-Si SPL or other types of SPLs are compared. For the nc-Si SPL, the transmission loss of the CPW lines is the lowest and is less than 1.05 dB/cm at frequencies up to 20 GHz. We can accurately confirm that the nc-Si film can more effectively improve the silicon substrate loss and crosstalk. In addition, the dependence of transmission loss on the thickness of nc-Si SPL was investigated. The experiment results also show that the thicker nc-Si results in the lower transmission loss and the transmission loss is 0.69 dB/cm for the SiO2-coated HR-Si substrate with a 400 nm nc-Si SPL.
In part 3, one-turn planar inductors of square and octagon shape were fabricated and their quality factors were used to assess the ability of the different surface-passivated HR-Si substrate for achieving high-Q inductors. The experiment results show that the use of the nc-Si can achieved the best Q-value, and which is about 23.6 at 20 GHz and 69.44 % higher than that for the nonpassivated SiO2 HR-Si substrate.
In part 4, we propose two kinds of high-performance bandpass filter (BPF), one is the novel dual-mode BPF with transmission zeros, it use the right crossed-slots of the patch resonator (RCSPR) with a pair of square etched areas (SEAs) as perturbation elements. Another is the novel dual-band dual-mode BPF and it is based on the first designed BPF to design. The proposed BPFs have very good measured characteristics including the low insertion loss, compact size, high selectivity and sharp rejection due to two transmission zeros in the passband edge.

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