積體電路元件尺寸的微縮化導致內層連線的時間延遲比整個元件的時間延遲更加嚴重，因此我們必須採用低介電常數材料（低電容）及銅導線（低阻值）來降低時間延遲效應的問題。然而，將低介電材料整合至積體電路製程時，由於低介電材料與相鄰材料間的熱膨脹係數不相等之故，將引發元件內部的殘留應力，且殘留應力隨著熱膨脹係數差異及導線層數之增加而增加。同時，因低介電材料多為組織鬆散、機械強度不理想的結構，在製程整合及封裝製程中的外力可輕易跨越介電材料之降伏強度，導致積體電路元件的破壞。因此，足夠之機械降伏強度乃低介電材料之基本特性要求。
紫外線熱處理為目前用來改善多孔隙低介電材料結構和機械性質之新觀念製程；而本論文主要目的為探討奈米積體電路製程中之SiOCH（碳氫化矽）低介電常數薄膜之紫外線熱處理時間對其薄膜和機械性質的影響，以使薄膜技術在製程整合應用上有最佳化的參數。具體而言，我們利用電漿輔助化學氣相沈積法，在矽基材上沈積多孔隙SiOCH薄膜，並且針對紫外線熱處理時間長短對薄膜的材料結構、薄膜性質、介電性質和機械性質之影響進行研究。在技術上，我們利用Fourier紅外線光譜分析SiOCH薄膜經紫外線熱處理後的鍵結型態，以金屬絕緣體半導體結構分析其介電性質，並利用Stoney方程式以曲率方式求鍍膜殘留應力。結果顯示，隨著紫外線熱處理時間的增加， (CHx / Si-O)的波峰比與 (Si-CH3 / Si-O) 的波峰比逐漸減少，反映出SiOCH薄膜材料在結構上之改變。在薄膜性質方面，隨著紫外線熱處理時間的增加，SiOCH薄膜之孔隙度與孔洞大小亦隨之增加。在介電性質方面，我們發現適當的紫外線熱處理時間可以使薄膜介電常數急速降低，而過長的紫外線熱處理時間將導致薄膜介電常數的上升。而在機械性質方面，我們發現隨著紫外線熱處理時間的增加，薄膜殘留應力、硬度也隨之增加。本文研究結果可提供紫外線輔助熱處理時間控制之參考，以得到適當的薄膜硬度和應力。

Two materials are used to solve the RC delay issue in the multi-layer conducting line of integrated circuit (IC) devices. One is low-k dielectric material (for its low capacity), and the other is copper contact line (for its low resistitivity). However, as there will be residue stress due to the thermal expansion coefficient difference between the low-k dielectric and its adjacent material. Furthermore, as the low-k dielectric material generally has a loose structure, and hence a low mechanical yield strength, the IC device would be easily destroyed during subsequent processing or packaging.
To alleviate the aforementioned problems, the brand new idea of ultraviolet (UV) curing process can be used for the processing of porous low-k dielectric materials. In this thesis, we discuss the effects of the UV curing time on the thin-film and mechanical properties of the low-k dielectric material SiOCH, which is typically used in nano-IC manufacturing. One of the major goals of this work is to systematically investigate the UV curing process applied on the SiOCH film, and to deduce optimized process parameters of the thin film processing. Specifically, the porous SiOCH thin film is deposited on a silicon substrate by a plasma enhanced chemical vapor deposition (PECVD) system. The bonding structure of the SiOCH film then is characterized by Fourier transform infrared spectropy (FTIR). The dielectric constant and current leakage are examined by the metal-insulator-semiconductor (MIS) structure. The residual stress is calculated by the Stoney’s equation. The FTIR results show that the peak ratios of CHx/Si-O and Si-CH3/Si-O decrease with increasing UV curing time. Also, the size of the porous structure increases with the time of the UV curing process. The residual stress and hardness of the film increase with the the UV curing time as well. It is also found that the dielectric constant decreases drastically with the the UV curing time at first, but then increases for longer curing time. The findings of this work can be used to determine the optimal UV curing time that produces the best compromise between thin film hardness and residual stress.

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