在這個高科技的時代，可看出以往主流的顯示器面板產品如液晶電視、液晶顯示器、筆記型電腦、智慧型手機及平板電腦等市場需求皆已接近飽和，但這些先進的顯示器科技仍然須使用以往的薄膜電晶體液晶顯示器（TFT-LCDs）技術，而控制液晶的開關元件TFT則扮演非常重大的角色，縮小TFT尺寸能提高每個像素的開口率以提高解析度。

　　其中低溫多晶矽薄膜電晶體（Low-Temperature Polysilicon Thin-Film Transistor, LTPS TFT）擁有解析度高、速度快等優點，能夠提高主動式陣列液晶顯示器（AMLCDs）的運作速度以提升畫面的流暢度，且廣泛應用的低溫製程—準雷射退火（Excimer Laser Annealing, ELA）使得LTPS TFT能製作在軟性基板上，可應用於現今熱門的智慧型穿戴式裝置。

　　但是若要製作大面積面板，ELA低溫製程會使畫面顯示不均勻，且生產成本非常高，不僅僅是因為製作LTPS TFT需要較多的光罩步驟，而且ELA準雷射退火範圍較小，不適合製造大面積面板。那麼如果要開發電路，則勢必需要投資大量金錢及時間成本，為了避免不必要的花費，本論文選擇以電腦輔助設計（Computer Aided Design, CAD）的方式來進行元件及電路模擬，透過撰寫硬體描述語言Verilog-A建立出LTPS TFT模型，並結合Synopsys HSPICE電路模擬軟體進行DC及AC分析模擬來驗證模型收斂性以及物理意義的正確性，利用較低的成本來建構精準的元件模型，並以節省金錢及時間成本的方法找到最佳電路特性。

　　本論文選擇以top-gate coplanar TFT結構進行開發，透過研讀相關文獻，比較此結構與傳統MOSFET運作原理之特性，並著重在poly-Si的材料性質，評估此材料與其他TFT常用材料的差異，深入探討並找尋合適的原理，並主要以Verilog-A來描述元件的物理行為及非理想效應，以HSPICE進行DC及AC電性驗證，以模擬結果和實際實驗數據做比較後，誤差值大部分在5%以內，萃取模型參數（Model card）並將之整合成資料庫（Library），可以讓電路設計者自由選擇所需參數，並透過改善等校電路架構來降低多指型（Multi-finger）LPTS TFT元件的誤差值，使得模擬出的電流能更接近實際現象。最後透過HSPICE將LTPS TFT精簡模型組成邏輯電路，來確認此模型在電路上的收斂正確性。

　　In this high-tech era, it can be seen that the market demand for mainstream display panel products such as LCD TVs, LCD monitors, laptops, smart phones and tablets is almost saturated. However, these advanced display technologies still have to use the conventional thin film transistor liquid crystal display (TFT-LCDs) technology, while the switching TFTs that control the liquid crystal play a very important role. Reducing the size of the TFT increases the aperture ratio of each pixel to improve resolution.

　　Among TFT technologies, “Low-Temperature Polysilicon Thin-Film Transistors, LTPS TFTs” have the advantages of high resolution and high speed, which can improve the operation speed of “Active Array Liquid Crystal Displays, AMLCDs”, and the smoothness of the display can be improved. The widely used low-temperature process “Excimer Laser Annealing, ELA” enables LTPS TFTs to be fabricated on flexible substrates for popular smart wearable accessories.

　　However, if a large-area panel is to be produced, the ELA low-temperature process will result in uneven display and high production cost, not only because more reticle steps are required to fabricate the LTPS TFT, but also the ELA range is small and unsuitable to manufacture large area panels. Then, designers will need to invest a lot of money and time if they want to develop circuits. In order to avoid unnecessary expenses, we choose “Computer Aided Design, CAD” to carry out device and circuit simulation, by writing “Hardware Description Language, HDL” Verilog-A to develop the LTPS TFTs model and combines the Synopsys HSPICE circuit simulation software for DC and AC analysis simulation to verify the convergence of the model and the correctness of the physical meaning. The lower cost is used to construct the accurate device model and save money and time to find the best circuit characteristics.

　　This paper chooses to develop with top-gate coplanar TFT structure. By studying related papers, comparing the characteristics of this structure with the operation principle of traditional MOSFETs, and focusing on the material properties of poly-Si, we evaluate the difference between this material and other commonly used materials of TFTs. With in-depth discussion we find the appropriate principles, and mainly use Verilog-A to describe the physical and non-ideal effects of device, DC and AC electrical verification with HSPICE. We also compare the simulated results with the actual measured data, and the error values can be almost less than 5%. Then, we extract the model parameters and integrate them into a database library which allows the circuit designer to freely select the desired parameters. Through improving the architecture of equivalent circuit, we are able to reduce the error rate of the multi-finger LTPS TFTs, and thus the simulated results can be closer to the actual phenomenon. Finally, the LTPS TFTs compact model is linked to logic circuit simulation through HSPICE to confirm the convergence correctness of the model.

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