研究生: |
張瑞廷 Chang, Jui-Ting |
---|---|
論文名稱: |
CMOS/MEMS射頻功率放大器與四次諧波混頻器之研製 Design and Implementation of a CMOS/MEMS RF Power Amplifier and a Quadruple Sub-harmonic Mixer |
指導教授: |
王永和
Wang, Yeong-Her 陳家豪 Chen, Ja-Hao |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 微電子工程研究所 Institute of Microelectronics |
論文出版年: | 2009 |
畢業學年度: | 97 |
語文別: | 中文 |
論文頁數: | 73 |
中文關鍵詞: | CMOS-MEMS 、功率分配器(合成器) 、功率放大器 、四次諧波混頻器 、雙工濾波器 、集總元件 |
外文關鍵詞: | CMOS-MEMS, Lumped elements, Frequency diplexer, Quadruple Sub-harmonic Mixer, Power Amplifier, Power divider (combiner) |
相關次數: | 點閱:115 下載:7 |
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本論文首先探討應用於802.11a頻段之5.8-GHz CMOS功率放大器。利用TSMC 0.18μm 1P6M CMOS製程並搭配國家晶片中心(CIC)所使用之MEMS後製程,製作出Lumped型式之Wilkinson 功率分配器,由於MEMS後製程與一般CMOS製程相比,其可製作出高Q值的電感,使得所設計之MEMS功率分配器
於5.8-GHz頻段時,能有較低之插入損耗(3.72-dB)。再藉由所設計之功率分配器結合兩個5.8-GHz頻段之CMOS功率放大器,將可提升功率放大器的輸出功率,
模擬結果得到增益為10.7-dB與輸出P1dB為22.6-dBm。
本文主要提供一個新式的四次諧波混頻器,利用P15 pHEMT GaAs製程來實現一個晶片面積為0.82 × 0.7 mm2的混頻器。這個新式的四次諧波混頻器結合集總式雙工濾波器將RF與LO訊號結合輸入至APDP二極體,並且經由低通濾波器混出IF訊號。此雙工濾波器的低頻通帶提供LO訊號輸入,高頻通帶提供RF訊號輸入,如此LO與RF訊號將會有良好的隔離度,並且獲得一寬頻的頻率響應,而低通濾波器濾波範圍為DC到2.5GHz頻段。此設計之四次諧波混頻器量測的轉換損耗為12.5-16.5 dB,LO-RF的隔離度超過15 dB,而且在16-31 GHz RF頻段的4LO-RF隔離度為50-59 dB,而輸入1dB壓縮點為2dBm。
A 5.8-GHz high-linearity CMOS power amplifier using a Wilkinson power combiner, implemented through a 0.18 μm RF CMOS/MEMS technology is investigated. The key issue is the use of an inductor to deliver the high quality factor (Q) which can improve the poor RF performances of the traditional inductor due to the thin metallization and substrate related losses. The proposed power divider achieved a lower insertion loss of 3.72-dB at 5.8-GHz. By combining two 5.8-GHz CMOS power amplifiers with the proposed divider, the proposed circuit delivers an output P1dB of 22.6-dBm with a power gain of 10.7-dB. The chip area is 1.4 × 1 mm2.
The second part of this thesis presents that a novel 16-31 GHz quadruple sub-harmonic monolithic passive mixer with a chip dimension of 0.82 × 0.7 mm2 is designed and fabricated using the 0.15 µm GaAs pHEMT process. The novel configuration of the quadruple sub-harmonic mixer consists of a lumped frequency diplexer and a low-pass filter utilizing a pair of anti-parallel Schottky barrier diode to achieve quadruple sub-harmonic mixing mechanism. The lumped frequency diplexer formed with a low-pass network and a high-pass network is used to reduce the chip dimension while operating at low frequency band and to improve the isolation between the RF and LO ports with a broadband operation. The low-pass filter supports an IF frequency range from DC to 2.5 GHz. From the measured results, the mixer exhibits a 12.5-16.5 dB conversion loss, a LO-to-RF isolation better than 15 dB, a 50-59 dB high 4LO-to-RF isolation over 16-31 GHz RF bandwidth, and an input 1 dB compression power of 2 dBm.
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