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研究生: 蔡旻融
Tsai, Min-Jung
論文名稱: 堆疊結構之氧化鉿與氧化鈦電阻式記憶體於類神經突觸特性之研究
HfO2 and TiO2 Stacking Structure Resistive Random Access Memory for Neuromorphic Synapse Applications
指導教授: 王永和
Wang, Yeong-Her
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 奈米積體電路工程碩士博士學位學程
MS Degree/Ph.D. Program on Nano-Integrated-Circuit Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 英文
論文頁數: 105
中文關鍵詞: 電阻式記憶體三維水平堆疊突觸可塑性氧化鉿氧化鈦
外文關鍵詞: RRAM, 3D Horizontal stacked, Synaptic plasticity, HfO2, TiO2
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  • 近年來,電阻式記憶體由於具備突觸特性而被受到廣泛的注目。然而,在眾多提出的元件中,找到真正合適的突觸元件仍然是一個很大的問題;這個突觸元件必需具有高密度堆疊、低功耗等特性,才能實現與大腦相比之類神經網路。
    此論文致力於開發能實現高密度、低能耗的突觸元件。以 Ti/Pt/TiO2/Pt/HfO2/Ti/Al 堆疊結構電阻式記憶體,成功將氧化鉿基電阻式記憶體與氧化鈦基電阻式記憶體結合在同個金屬-絕緣層-金屬堆疊的高密度元件之中,並模仿突觸權重的增益效應與抑制效應,更透過寫入波型的最佳化,調整權重可塑性之非線性型,使兩種電阻式記憶體分別達到了0.08與0.15的優異非線性度,成功改善元件之非線性並提升仿生運算系統的訓練準確性,並使兩種記憶體達到最高為98% 以上的圖形辨識模擬準確率,最後在反覆讀寫能力上,最高來到了10^7以上的操作次數。相較於其他已發表之文章,本篇論文在密度、非線性度、模擬準確度與反覆讀寫能力上,都具有明顯的優勢,證明了該元件對於未來深度學習的硬體應用有相當的可行性。

    Recently, resistive switching memory (RRAM) has attracted considerable attention because of its intriguing synaptic features. However, among the various RRAM devices currently available, finding a truly appropriate synaptic device is still challenging because high-density integration and low power consumption are required to construct a neural network comparable to that of the human brain.
    This thesis thus focuses on the development of synapses that can achieve high integration density and low-power consumption. We successfully demonstrated Ti/Pt/TiO2/Pt/HfO2/Ti/Al RRAMs, which the HfO2-based RRAM and TiO2-based RRAM are combined into one MIMIM high density device, and mimic the basic characteristics of a synapse, potentiation and depression well. We also adjusted the nonlinearity of the weight update using input waveform optimization. Both of the RRAMs can achieve the extraordinary nonlinearity of 0.08 and 0.15,respectively. The improvement of the nonlinearity successfully increases the accuracy of the pattern recognition simulation up to 98%. For the endurance, over 10^7 switching cycles could be observed. Comparing with other published papers, the advantages of the density, nonlinearity, accuracy of pattern recognition and endurance is obvious, indicating the excellent feasibility for future deep learning hardware applications.

    摘要 II Abstract IV 誌謝 VI Contents VIII List of Tables XIII List of Figures XIV Chapter 1 Introduction 1 1.1 Resistive Random-Access Memory 1 1.1.1 Background 1 1.1.2 Fundamental definitions 2 1.1.3 Operating principle of resistive memory 3 1.1.3.1 Forming process 3 1.1.3.2 Current Compliance 3 1.1.3.3 Set and Reset process 3 1.1.3.4 Unipolar and Bipolar 4 1.1.4 Conduction mechanisms 5 1.1.4.1 Ohmic conduction 6 1.1.4.2 Schottky emission 7 1.1.4.3 Poole-Frenkel emission 8 1.1.4.4 Tunneling 9 1.1.4.5 Hopping conduction 11 1.1.4.6 Space Charge Limited Current 12 1.1.5 Crossbar RRAM Array 13 1.1.5.1 Two-Dimensional Crossbar Array 13 1.1.5.2 Three-Dimensional Crossbar Array 14 1.2 Neuromorphic System 16 1.2.1 Background 16 1.2.2 Artificial Neural Networks 17 1.2.3 Synaptic Plasticity and Learning 18 1.2.4 Potentiation and Depression 20 1.3 Motivation 23 1.4 Organization of the Thesis 24 Chapter 2 Experiment 26 2.1 Fabrication Equipment 26 2.1.1 Mask Aligner 26 2.1.2 Spin Coater 27 2.1.3 Oven 28 2.1.4 Radio Frequency Sputtering (RF Sputtering) 28 2.1.5 Electron Beam Evaporator 30 2.1.6 Reactive Ion Etching System (RIE) 31 2.1.7 Atomic Layer Deposition System (ALD) 32 2.2 Material Analysis Equipment 33 2.2.1 Energy-Dispersive X-ray Spectroscopy (EDS) 33 2.2.2 Focused Ion Beam (FIB) 34 2.2.3 Transmission Electron Microscopy (TEM) 35 2.3 Electrical Analysis Equipment 36 2.3.1 Agilent B1500A 36 2.4 Mask Layout Design 37 2.4.1 Mask Design 37 2.4.2 Pattern Design 38 2.5 Fabrication Processes 42 2.5.1 Substrate clean 42 2.5.2 Bottom Electrode 43 2.5.2.1 Lithography 43 2.5.2.2 RF Sputtering 44 2.5.2.3 Lift-off 45 2.5.3 Isolation Layer 46 2.5.4 Via Hole 46 2.5.4.1 Lithography 46 2.5.4.2 RIE Etching 47 2.5.5 Resistive Switching Layer 48 2.5.6 Middle Electrode 48 2.5.6.1 Lithography 48 2.5.6.2 RF Sputtering 50 2.5.6.3 Lift Off 50 2.5.7 Resistive Switching Layer 50 2.5.8 Top Electrode 51 2.5.8.1 Lithography 51 2.5.8.2 RF Sputtering 52 2.5.8.3 Lift Off 52 2.5.9 Pad Etching 53 2.5.9.1 BE Pad Lithography 53 2.5.9.2 BE Pad RIE Etching 54 2.5.9.3 ME Pad Lithography 54 2.5.9.4 ME Pad RIE Etching 56 2.6 Schematic of Workflow 57 Chapter 3 Results and Discussion 61 3.1 The Ti/Pt/TiO2/Pt/HfO2/Ti/Al Device 61 3.1.1 Physical Properties 61 3.1.1.1 TEM image of a cross-section of the device 61 3.1.1.2 Energy Dispersive Spectroscopy Element Analysis 63 3.1.2 Electrical properties 65 3.1.2.1 The Measuring Method 65 3.1.2.2 DC IV characteristics 67 3.1.2.3 Curve Fitting (Conduction mechanism analysis) 71 3.1.2.4 Endurance 74 3.1.2.5 Cumulative Probability 77 3.1.2.6 Synaptic Characteristics 79 3.1.2.7 Comparison 88 3.2 Simulation 89 Chapter 4 Conclusion 95 Chapter 5 Future Works 97 References 100

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