本論文主要是針對IC產品故障分析手法及其技術作比較，在現今生活中IC產品幾乎是到處可見，這是由於積體電路的不斷進步，使得人們的生活更加便利，因此對IC產品的品質不斷地提高。IC產品的發展是從設計、製程、晶圓測試、封裝工程到最後測試等流程。然而，當新產品發表後，對於公司獲利而言，產品能夠上市並且量產的時程變得非常關鍵。 但是通常第一批的良率非常低，而導致上市的時程延長，減低獲利。良率低可能是由於產品設計，晶圓製造或兩者的相互作用所造成的。因此利用故障分析技術，針對故障位置進行分析及判定，並確認晶圓製程中的問題或是產品本身設計的問題。
首先探討不同類型故障點的定位技術、優缺點以及舉實例來加以說明。初步的故障點分析技術有微光偵測術(photon emission microscopy)、熱光束產生電阻變化偵測術 (optical beam induced resistance change) 、液晶熱反應偵測術 (liquid crystal microscopy) 、靜態隨機儲存記憶體的故障點分析 (static random access memory of bitmap/scramble) 、最後是利用測試模組的故障點分析 (diagnosis)。接著在電性上故障點分析的技術有被動式電壓對比 (passive voltage contrast)、傳導式原子力量測 (conductive atom force microscopy)、奈米探針量測 (nano-probing)，最後總結和比較各種故障點定位技術。
接著敘述目前故障分析所遇到的一些困難和挑戰，像是分析樣品準備工作的困難 (sample preparation)、光學顯微鏡 (optical microscope) 倍率的極限、被動式電壓對比 (passive voltage contrast)判斷上的困難、濕蝕刻和乾蝕刻 (wet/dry etching) 控制的困難、及利用化學和物性著色技術來檢測元件接合剖面處的困難 (Junction stain)。接下來是介紹兩個新的故障分析的技術與應用，一個是電子束吸收/引致電流法 (EBAC / EBIC)，另一個是動態(dynamic) EMMI的應用。最後是針對故障分析技術提出幾個未來將面臨的問題及挑戰，像是因製程縮小所衍生出來的 HKMG (High-K Metal Gate)、 FinFE (Tri-gate fin field-effect transistor) 的新製程，及一些特別的製程 (HV、 MEMS 、 3D-IC…)，這些都是未來故障分析技術所需深入探討及研究的方向。

This thesis focuses on failure analysis and techniques comparison of IC (integrated circuit) products. IC products can be seen everywhere nowadays, because the integrated circuit semiconductor is progressing continually and makes life more convenient. Therefore, the quality of integrated circuit semiconductor plays an important role in all electronic products. There are certain manufacture procedures for the quality procedure regulations which are products design, wafer manufacturing processes, WAT (Wafer Acceptance Test), CP (Chip Probing), FT (Final Testing) and package assembly. However, when a new product publicized, the time-to-market becomes critical to the profit. But, usually the first cut gets low yield. This violently extends the time-to-market and reduces profit. The low yield may come from design, manufacturing or interaction of both. Thus, utilize failure analysis to judge the failure location can infer the process defects of manufacturing wafer or design problem.
First, introduce the kind techniques of failure site localization, the advantages and limitations and applications by real cases. The preliminary techniques of failure site localization are Photon Emission Microscopy (PEM)、Optical Beam Induced Resistance Change (OBIRCH)、 Liquid Crystal microscopy (LCM)、Scramble/bitmap and Diagnosis. The continuous techniques of failure site localization (electrical techniques) are Passive Voltage Contrast (PVC)、Conductive Atom Force Microscopy (C-AFM)、and Nano-probing.
Next, describe currently FA challenges of sample preparation、Optical Microscope (OM)、Passive Voltage Contrast (PVC)、Wet/Dry etching and Junction stain. And then, introduce two new applications of FA techniques, EBAC (Electron Beam Absorbed Current) & EBIC (Electron Beam Induced Current), and dynamic EMMI. Finally, briefly introduce the future works of failure analysis, and process shrinkage like N28 & N20 HKMG 、 FinFET and special process (HV、MEMS、3DIC…).

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