為了維持互補型金氧半電晶體（CMOS）持續的微縮，高介電常數介電層（High-K）與金屬閘電極（Metal gate）技術已成為邏輯CMOS製程技術基礎。然而金屬閘電極的功函數受到材料本質特性限制極易受到傳統高溫回火影響而退化至矽能帶中間。因此金屬閘電極不佳的熱穩定性使得High-K / Metal gate技術無法滿足能帶邊金屬功函數（Band edge metal work function）的要求。
本文研究利用多層金屬及後續回火來調控金屬閘極功函數以達到元件特性的需要。吾人分別使用TaN/TiAl 及 TaN/TiN於n- 及 p- 型 MOSFET。並在N2及O2氣體中做TaN/TiAl及TaN/TiN的高溫回火，來微調功函數。
除外，更利用28 奈米CMOS製程完成元件樣品及各種量測諸如I/V，C/V及EDS等來鑑定方法的可行性。實驗結果證實，經由最佳化的高溫回火，多層金屬及後續回火確實可滿足奈米CMOS元件能帶邊金屬功函數的要求。
又藉由EDS分析金屬閘電極的剖面元素成分特徵，我們發現鈦鋁合金的成分分佈及氧的分佈分別決定n型及p型閘電極的金屬功函數。

To sustain CMOS transistor continuously scaling, high-K and metal gate technology has become the foundation of logic CMOS technology. Because of the direct tunneling effect, a high gate leakage will be induced in the conventional Poly/SiON gate with a very thin SiON dielectric. Besides, the poly depletion effect also limits Tox_inv for further scaling. Furthermore, the work function of a metal gate electrode is easily degraded to Si middle band gap after high temperature activation steps and this excludes the use of metal with dual band edge work function for the high-K dielectric before the S/D activation step.
To overcome the drawback, in this thesis, we study the use of multi-layer metal gates and post metal annealing to modulate work functions of gate metals to meet the CMOS requirements. The multi-layer gate consists of TaN/TiAl and TaN/TiN, respectively for n-and p-type MOSFET. Besides, the TaN/TiAl and TaN/TiN are annealed under N2 and O2 ambient, respectively for finely tuning of the work functions.
We use the MOSFETs prepared by a foundry state-of-the-art 28-nm CMOS technology as vehicles to study the work function modulation. Experimental results of I/V, C/V and energy dispersive X-ray spectroscopy (EDS) had evidenced the proposal is available for deep nano CMOS technology applications. Furthermore, EDS depth profiling through metal gate stacks also revealed that the distribution of Al / Ti and the oxygen content controlled the n- and p- type metal gate work function, respectively.

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