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研究生： 阮氏海燕
Yen, Nguyen Thi Hai
論文名稱： 優化石墨烯電晶體的微影製程
Improving the lithography of graphene transistors
指導教授： 謝馬利歐
Mario Hofmann
學位類別： 碩士
Master
系所名稱： 工學院 - 尖端材料國際碩士學位學程
International Curriculum for Advanced Materials Program
論文出版年： 2015
畢業學年度： 103
語文別： 英文
論文頁數： 56
外文關鍵詞： Graphene, FET, Photolithograph, transferable method
相關次數： 點閱：88  下載：1 
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    • Massive fabrication of graphene devices is required to take advantage of the promise of this novel material. Photolithography is the most efficient patterning technology. However, several new challenges arise when patterning graphene. First, lithography processes rely on organic photoresists whose residue adversely affects graphene’s transport properties. In addition, graphene is further deteriorated by the lift-off process, which partly derives from the low adhesion between graphene and the substrate. Finally, photolithography cannot exploit the flexibility of graphene, i.e. it restricts graphene on the certain flat substrates.
    We here demonstrate a novel fabrication process that retains the flexibility of graphene and preserves the quality of graphene. Our idea is to take advantage of the good adhesion between graphene and the growth substrate. In this method, all photolithographic patterns of graphene and metal have been created before transferring to target substrates. This approach is compatible with exotic and three-dimensional substrates.
    The photolithographical patterning is based on an initially deposited aluminum hard mask. This approach is shown to achieve a higher quality of graphene as characterized through transport measurement, Raman spectroscopy and X-ray photoelectron spectroscopy (XPS).

    ABSTRACT I ACKNOWLEDGEMENT II TABLE OF CONTENTS III LIST OF FIGURES VI LIST OF TABLES VIII I. INTRODUCTION 1 1.1 Background 1 1.1.1 Graphene 1 1.1.2 Electrical properties of graphene 2 1.1.3 Graphene synthesis 6 1.1.4. Graphene applications 7 1.2 Graphene field effect transistor (GFETs) 8 1.2.1 GFETs 8 1.2.2 Fabrication GFETs and Disadvantages of lithographic technology 10 1.2.3 Solution 11 1.3 Motivation 11 II. LITHOGRAPHY 13 2.1 Introduction 13 2.2 Procedures 14 2.2.1 Coating 14 2.2.1.1 Photoresist 14 2.2.1.2 Spin 14 2.2.1.3 Soft-bake 15 2.2.2 Exposure 15 2.2.2.1 Photomask 15 2.2.2.2 Alignment 16 2.2.2.3 Light source 17 2.2.2.4 Exposure 17 2.2.2.5 Post-exposure bake 19 2.2.3 Development 20 2.2.3.1 Develop 20 2.2.3.2 Hard-bake 21 2.2.4 Subtractive and additive processes 22 2.3 Resolution limitation of images 23 III. EXPERIMENT 24 3.1 Machines 24 3.1.1 UV imprinter/Double side mask aligner EVG 620 24 3.1.2 E-beam evaporator 25 3.1.3 Reactive ion etching (RIE) 26 3.2 Sample preparation 27 3.2.1 Graphene sample preparation 27 3.2.2 Graphene transferring 28 3.3 Fabrication GFETs by photolithographic patterning 29 3.3.1 Photomask and photoresist 29 3.3.2 Traditional method 30 3.3.2 Transferable method 31 3.4 Measurement 32 3.4.1 Raman 32 3.4.2 X-ray photoelectron spectroscopy (XPS) 32 3.4.3 IV (current-voltage) characteristics 33 3.4.3.1 Basic sweep measurement and pulsed sweep measurement 33 3.4.3.3 Fitting data 34 IV. RESULTS AND DISCUSSION 36 4.1 Fabrication of graphene-based devices by photolithography 36 4.1.1 Influence of substrate on lithography outcomes 36 4.2 Effect of capping layer on graphene quality 38 4.2.1 Raman characterization 39 4.2.2 XPS 43 4.2.2.1 Survey spectrum 43 4.2.2.2 High resolution for C1s 44 4.2.3 Carrier transport characteristics 46 4.2.3.1 IV characteristics 46 4.2.3.2 Mobility extraction 47 4.3 Effect of charge traps 49 4. 3.1 Hysteresis phenomena 49 4. 3.2 Pulsed IV measurement 50 V. CONCLUSION 52 VI. OUTLOOK 53 REFERENCES 54

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